From 961548ff330db3301a8c0f7a7dd61d6fb4f40084 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Mon, 13 Jul 2020 21:29:19 -0400 Subject: [PATCH] Fixes for 5.4 Signed-off-by: Sasha Levin --- ...m_reset_vcpu-return-code-being-incor.patch | 63 +++++++++++++++++++ queue-5.4/series | 1 + 2 files changed, 64 insertions(+) create mode 100644 queue-5.4/kvm-arm64-fix-kvm_reset_vcpu-return-code-being-incor.patch diff --git a/queue-5.4/kvm-arm64-fix-kvm_reset_vcpu-return-code-being-incor.patch b/queue-5.4/kvm-arm64-fix-kvm_reset_vcpu-return-code-being-incor.patch new file mode 100644 index 00000000000..f58ae866c41 --- /dev/null +++ b/queue-5.4/kvm-arm64-fix-kvm_reset_vcpu-return-code-being-incor.patch @@ -0,0 +1,63 @@ +From 72ecb835d6f0483534bed476c25f6ef37c72fc25 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 17 Jun 2020 11:54:56 +0100 +Subject: KVM: arm64: Fix kvm_reset_vcpu() return code being incorrect with SVE + +From: Steven Price + +If SVE is enabled then 'ret' can be assigned the return value of +kvm_vcpu_enable_sve() which may be 0 causing future "goto out" sites to +erroneously return 0 on failure rather than -EINVAL as expected. + +Remove the initialisation of 'ret' and make setting the return value +explicit to avoid this situation in the future. + +Fixes: 9a3cdf26e336 ("KVM: arm64/sve: Allow userspace to enable SVE for vcpus") +Cc: stable@vger.kernel.org +Reported-by: James Morse +Signed-off-by: Steven Price +Signed-off-by: Marc Zyngier +Link: https://lore.kernel.org/r/20200617105456.28245-1-steven.price@arm.com +Signed-off-by: Sasha Levin +--- + arch/arm64/kvm/reset.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c +index f4a8ae9188275..784d485218ca1 100644 +--- a/arch/arm64/kvm/reset.c ++++ b/arch/arm64/kvm/reset.c +@@ -258,7 +258,7 @@ static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu) + int kvm_reset_vcpu(struct kvm_vcpu *vcpu) + { + const struct kvm_regs *cpu_reset; +- int ret = -EINVAL; ++ int ret; + bool loaded; + + /* Reset PMU outside of the non-preemptible section */ +@@ -281,15 +281,19 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) + + if (test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) || + test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features)) { +- if (kvm_vcpu_enable_ptrauth(vcpu)) ++ if (kvm_vcpu_enable_ptrauth(vcpu)) { ++ ret = -EINVAL; + goto out; ++ } + } + + switch (vcpu->arch.target) { + default: + if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { +- if (!cpu_has_32bit_el1()) ++ if (!cpu_has_32bit_el1()) { ++ ret = -EINVAL; + goto out; ++ } + cpu_reset = &default_regs_reset32; + } else { + cpu_reset = &default_regs_reset; +-- +2.25.1 + diff --git a/queue-5.4/series b/queue-5.4/series index f922d1755d7..56beeb00e8d 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -83,3 +83,4 @@ kvm-arm64-annotate-hyp-nmi-related-functions-as-__always_inline.patch kvm-x86-bit-8-of-non-leaf-pdpes-is-not-reserved.patch kvm-x86-inject-gp-if-guest-attempts-to-toggle-cr4.la57-in-64-bit-mode.patch kvm-x86-mark-cr4.tsd-as-being-possibly-owned-by-the-guest.patch +kvm-arm64-fix-kvm_reset_vcpu-return-code-being-incor.patch -- 2.47.3