From 9b5c5b788014949d9d8917825423f5307ead5fd6 Mon Sep 17 00:00:00 2001 From: claziss Date: Wed, 23 Jan 2019 11:04:19 +0000 Subject: [PATCH] [ARC] atomics: Add operand to DMB instruction Atomics use DMB instruction to enforce ordering of loads/stores. Currently gcc generates DMB w/o any arg which is a no-op. Fix that by generating DMB 3 which enforces R+W ordering. It is stricter than what acq/rel expect, but there's no other way. gcc/ 2019-xx-xx Vineet Gupta * config/arc/atomic.md: Add operand to DMB instruction git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@268181 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 4 ++++ gcc/config/arc/atomic.md | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a83a8aca4c4..f1522bec6142 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2019-01-23 Vineet Gupta + + * config/arc/atomic.md: Add operand to DMB instruction. + 2019-01-23 Jakub Jelinek PR tree-optimization/88964 diff --git a/gcc/config/arc/atomic.md b/gcc/config/arc/atomic.md index 562c79a6578e..fe767dfedd5c 100644 --- a/gcc/config/arc/atomic.md +++ b/gcc/config/arc/atomic.md @@ -44,7 +44,7 @@ { if (TARGET_HS) { - return "dmb"; + return "dmb\\t3"; } else { -- 2.47.3