From 9c2f7992551f4addd4a6343d9b58b39ad014e6dc Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Fri, 12 Sep 2025 17:48:44 +0300 Subject: [PATCH] drm/i915: add vlv_clock_get_hrawclk() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add vlv_clock_get_hrawclk() helper to hide the details from the callers. Reviewed-by: Michał Grzelak Acked-by: Ville Syrjälä Link: https://lore.kernel.org/r/ad3c3d0baf16eb0ef3a0ac3edfbab327c564e743.1757688216.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_cdclk.c | 9 +-------- drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++ drivers/gpu/drm/i915/display/intel_display.h | 1 + 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 3025951eac281..45ac378922ffc 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -3561,13 +3561,6 @@ static int pch_rawclk(struct intel_display *display) return (intel_de_read(display, PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK) * 1000; } -static int vlv_hrawclk(struct intel_display *display) -{ - /* RAWCLK_FREQ_VLV register updated from power well code */ - return vlv_get_cck_clock_hpll(display->drm, "hrawclk", - CCK_DISPLAY_REF_CLOCK_CONTROL); -} - static int i9xx_hrawclk(struct intel_display *display) { struct drm_i915_private *i915 = to_i915(display->drm); @@ -3601,7 +3594,7 @@ u32 intel_read_rawclk(struct intel_display *display) else if (HAS_PCH_SPLIT(display)) freq = pch_rawclk(display); else if (display->platform.valleyview || display->platform.cherryview) - freq = vlv_hrawclk(display); + freq = vlv_clock_get_hrawclk(display->drm); else if (DISPLAY_VER(display) >= 3) freq = i9xx_hrawclk(display); else diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index eca9f2508e9da..487870811d3a4 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -190,6 +190,12 @@ int vlv_get_cck_clock_hpll(struct drm_device *drm, return hpll; } +int vlv_clock_get_hrawclk(struct drm_device *drm) +{ + /* RAWCLK_FREQ_VLV register updated from power well code */ + return vlv_get_cck_clock_hpll(drm, "hrawclk", CCK_DISPLAY_REF_CLOCK_CONTROL); +} + int vlv_clock_get_czclk(struct drm_device *drm) { struct drm_i915_private *i915 = to_i915(drm); diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 811066a9e69d1..dbfb4b4aee4e3 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -440,6 +440,7 @@ int vlv_get_cck_clock(struct drm_device *drm, const char *name, u32 reg, int ref_freq); int vlv_get_cck_clock_hpll(struct drm_device *drm, const char *name, u32 reg); +int vlv_clock_get_hrawclk(struct drm_device *drm); int vlv_clock_get_czclk(struct drm_device *drm); int vlv_clock_get_gpll(struct drm_device *drm); bool intel_has_pending_fb_unpin(struct intel_display *display); -- 2.47.3