From a1339b71a06dba578031bf54e85852bd83a65d81 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Wed, 7 May 2025 12:56:38 -0400 Subject: [PATCH] Drop cpufreq backport from older kernels Signed-off-by: Sasha Levin --- ...tate-fold-intel_pstate_max_within_li.patch | 61 ---------------- ...tate-revise-global-turbo-disable-che.patch | 69 ------------------- ...tate-unchecked-msr-aceess-in-legacy-.patch | 65 ----------------- queue-5.10/series | 3 - ...tate-fold-intel_pstate_max_within_li.patch | 61 ---------------- ...tate-revise-global-turbo-disable-che.patch | 69 ------------------- ...tate-unchecked-msr-aceess-in-legacy-.patch | 65 ----------------- queue-5.4/series | 3 - 8 files changed, 396 deletions(-) delete mode 100644 queue-5.10/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch delete mode 100644 queue-5.10/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch delete mode 100644 queue-5.10/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch delete mode 100644 queue-5.4/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch delete mode 100644 queue-5.4/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch delete mode 100644 queue-5.4/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch diff --git a/queue-5.10/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch b/queue-5.10/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch deleted file mode 100644 index a738ab950a..0000000000 --- a/queue-5.10/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 491688819a369a1aedb99696452e36f894a5659f Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Mon, 25 Mar 2024 18:01:58 +0100 -Subject: cpufreq: intel_pstate: Fold intel_pstate_max_within_limits() into - caller - -From: Rafael J. Wysocki - -[ Upstream commit 032c5565eb80edb6f2faeb31939540c897987119 ] - -Fold intel_pstate_max_within_limits() into its only caller. - -No functional impact. - -Signed-off-by: Rafael J. Wysocki -Acked-by: Srinivas Pandruvada -Stable-dep-of: ac4e04d9e378 ("cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode") -Signed-off-by: Sasha Levin ---- - drivers/cpufreq/intel_pstate.c | 13 ++++--------- - 1 file changed, 4 insertions(+), 9 deletions(-) - -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index 15d65c1458ed1..68747781a4f5c 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -1697,14 +1697,6 @@ static void intel_pstate_set_min_pstate(struct cpudata *cpu) - intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); - } - --static void intel_pstate_max_within_limits(struct cpudata *cpu) --{ -- int pstate = max(cpu->pstate.min_pstate, cpu->max_perf_ratio); -- -- update_turbo_state(); -- intel_pstate_set_pstate(cpu, pstate); --} -- - static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) - { - cpu->pstate.min_pstate = pstate_funcs.get_min(); -@@ -2270,12 +2262,15 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) - intel_pstate_update_perf_limits(cpu, policy->min, policy->max); - - if (cpu->policy == CPUFREQ_POLICY_PERFORMANCE) { -+ int pstate = max(cpu->pstate.min_pstate, cpu->max_perf_ratio); -+ - /* - * NOHZ_FULL CPUs need this as the governor callback may not - * be invoked on them. - */ - intel_pstate_clear_update_util_hook(policy->cpu); -- intel_pstate_max_within_limits(cpu); -+ update_turbo_state(); -+ intel_pstate_set_pstate(cpu, pstate); - } else { - intel_pstate_set_update_util_hook(policy->cpu); - } --- -2.39.5 - diff --git a/queue-5.10/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch b/queue-5.10/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch deleted file mode 100644 index be9fd1ab96..0000000000 --- a/queue-5.10/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch +++ /dev/null @@ -1,69 +0,0 @@ -From fed80b566af209cfd2d3445769a4075611c9c582 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 7 Sep 2023 11:02:07 -0700 -Subject: cpufreq: intel_pstate: Revise global turbo disable check - -From: Srinivas Pandruvada - -[ Upstream commit 37b6ddba967c601479bea418a7ac6ff16b6232b7 ] - -Setting global turbo flag based on CPU 0 P-state limits is problematic -as it limits max P-state request on every CPU on the system just based -on its P-state limits. - -There are two cases in which global.turbo_disabled flag is set: -- When the MSR_IA32_MISC_ENABLE_TURBO_DISABLE bit is set to 1 -in the MSR MSR_IA32_MISC_ENABLE. This bit can be only changed by -the system BIOS before power up. -- When the max non turbo P-state is same as max turbo P-state for CPU 0. - -The second check is not a valid to decide global turbo state based on -the CPU 0. CPU 0 max turbo P-state can be same as max non turbo P-state, -but for other CPUs this may not be true. - -There is no guarantee that max P-state limits are same for every CPU. This -is possible that during fusing max P-state for a CPU is constrained. Also -with the Intel Speed Select performance profile, CPU 0 may not be present -in all profiles. In this case the max non turbo and turbo P-state can be -set to the lowest possible P-state by the hardware when switched to -such profile. Since max non turbo and turbo P-state is same, -global.turbo_disabled flag will be set. - -Once global.turbo_disabled is set, any scaling max and min frequency -update for any CPU will result in its max P-state constrained to the max -non turbo P-state. - -Hence remove the check of max non turbo P-state equal to max turbo P-state -of CPU 0 to set global turbo disabled flag. - -Signed-off-by: Srinivas Pandruvada -[ rjw: Subject edit ] -Signed-off-by: Rafael J. Wysocki -Stable-dep-of: ac4e04d9e378 ("cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode") -Signed-off-by: Sasha Levin ---- - drivers/cpufreq/intel_pstate.c | 6 +----- - 1 file changed, 1 insertion(+), 5 deletions(-) - -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index 4359ed1d3b7e9..15d65c1458ed1 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -488,13 +488,9 @@ static int intel_pstate_get_cppc_guranteed(int cpu) - static inline void update_turbo_state(void) - { - u64 misc_en; -- struct cpudata *cpu; - -- cpu = all_cpu_data[0]; - rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); -- global.turbo_disabled = -- (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE || -- cpu->pstate.max_pstate == cpu->pstate.turbo_pstate); -+ global.turbo_disabled = misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE; - } - - static int min_perf_pct_min(void) --- -2.39.5 - diff --git a/queue-5.10/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch b/queue-5.10/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch deleted file mode 100644 index 13603f80e5..0000000000 --- a/queue-5.10/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 70a469d8e5b8efbb64fe41df5815428f670c97d4 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Tue, 29 Apr 2025 14:07:11 -0700 -Subject: cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode - -From: Srinivas Pandruvada - -[ Upstream commit ac4e04d9e378f5aa826c2406ad7871ae1b6a6fb9 ] - -When turbo mode is unavailable on a Skylake-X system, executing the -command: - - # echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo - -results in an unchecked MSR access error: - - WRMSR to 0x199 (attempted to write 0x0000000100001300). - -This issue was reproduced on an OEM (Original Equipment Manufacturer) -system and is not a common problem across all Skylake-X systems. - -This error occurs because the MSR 0x199 Turbo Engage Bit (bit 32) is set -when turbo mode is disabled. The issue arises when intel_pstate fails to -detect that turbo mode is disabled. Here intel_pstate relies on -MSR_IA32_MISC_ENABLE bit 38 to determine the status of turbo mode. -However, on this system, bit 38 is not set even when turbo mode is -disabled. - -According to the Intel Software Developer's Manual (SDM), the BIOS sets -this bit during platform initialization to enable or disable -opportunistic processor performance operations. Logically, this bit -should be set in such cases. However, the SDM also specifies that "OS -and applications must use CPUID leaf 06H to detect processors with -opportunistic processor performance operations enabled." - -Therefore, in addition to checking MSR_IA32_MISC_ENABLE bit 38, verify -that CPUID.06H:EAX[1] is 0 to accurately determine if turbo mode is -disabled. - -Fixes: 4521e1a0ce17 ("cpufreq: intel_pstate: Reflect current no_turbo state correctly") -Signed-off-by: Srinivas Pandruvada -Cc: All applicable -Signed-off-by: Rafael J. Wysocki -Signed-off-by: Sasha Levin ---- - drivers/cpufreq/intel_pstate.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index 68747781a4f5c..c0e3488c44047 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -489,6 +489,9 @@ static inline void update_turbo_state(void) - { - u64 misc_en; - -+ if (!cpu_feature_enabled(X86_FEATURE_IDA)) -+ return true; -+ - rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); - global.turbo_disabled = misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE; - } --- -2.39.5 - diff --git a/queue-5.10/series b/queue-5.10/series index e9667733eb..8c65744b02 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -38,6 +38,3 @@ irqchip-gic-v2m-prevent-use-after-free-of-gicv2m_get.patch usb-chipidea-ci_hdrc_imx-use-dev_err_probe.patch usb-chipidea-ci_hdrc_imx-implement-usb_phy_init-erro.patch serial-msm-configure-correct-working-mode-before-sta.patch -cpufreq-intel_pstate-revise-global-turbo-disable-che.patch -cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch -cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch diff --git a/queue-5.4/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch b/queue-5.4/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch deleted file mode 100644 index 623402f18e..0000000000 --- a/queue-5.4/cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 540f1c0954a14a97077fd906cfe6bf8cc0aebe64 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Mon, 25 Mar 2024 18:01:58 +0100 -Subject: cpufreq: intel_pstate: Fold intel_pstate_max_within_limits() into - caller - -From: Rafael J. Wysocki - -[ Upstream commit 032c5565eb80edb6f2faeb31939540c897987119 ] - -Fold intel_pstate_max_within_limits() into its only caller. - -No functional impact. - -Signed-off-by: Rafael J. Wysocki -Acked-by: Srinivas Pandruvada -Stable-dep-of: ac4e04d9e378 ("cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode") -Signed-off-by: Sasha Levin ---- - drivers/cpufreq/intel_pstate.c | 13 ++++--------- - 1 file changed, 4 insertions(+), 9 deletions(-) - -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index 764ecccdfa8ad..28a038b2189f7 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -1537,14 +1537,6 @@ static void intel_pstate_set_min_pstate(struct cpudata *cpu) - intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); - } - --static void intel_pstate_max_within_limits(struct cpudata *cpu) --{ -- int pstate = max(cpu->pstate.min_pstate, cpu->max_perf_ratio); -- -- update_turbo_state(); -- intel_pstate_set_pstate(cpu, pstate); --} -- - static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) - { - cpu->pstate.min_pstate = pstate_funcs.get_min(); -@@ -2107,12 +2099,15 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) - intel_pstate_update_perf_limits(cpu, policy->min, policy->max); - - if (cpu->policy == CPUFREQ_POLICY_PERFORMANCE) { -+ int pstate = max(cpu->pstate.min_pstate, cpu->max_perf_ratio); -+ - /* - * NOHZ_FULL CPUs need this as the governor callback may not - * be invoked on them. - */ - intel_pstate_clear_update_util_hook(policy->cpu); -- intel_pstate_max_within_limits(cpu); -+ update_turbo_state(); -+ intel_pstate_set_pstate(cpu, pstate); - } else { - intel_pstate_set_update_util_hook(policy->cpu); - } --- -2.39.5 - diff --git a/queue-5.4/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch b/queue-5.4/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch deleted file mode 100644 index c32e8ba883..0000000000 --- a/queue-5.4/cpufreq-intel_pstate-revise-global-turbo-disable-che.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 36a552f2cc890b0b6ae0d97e1a8eb1c4a8cc1cbe Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 7 Sep 2023 11:02:07 -0700 -Subject: cpufreq: intel_pstate: Revise global turbo disable check - -From: Srinivas Pandruvada - -[ Upstream commit 37b6ddba967c601479bea418a7ac6ff16b6232b7 ] - -Setting global turbo flag based on CPU 0 P-state limits is problematic -as it limits max P-state request on every CPU on the system just based -on its P-state limits. - -There are two cases in which global.turbo_disabled flag is set: -- When the MSR_IA32_MISC_ENABLE_TURBO_DISABLE bit is set to 1 -in the MSR MSR_IA32_MISC_ENABLE. This bit can be only changed by -the system BIOS before power up. -- When the max non turbo P-state is same as max turbo P-state for CPU 0. - -The second check is not a valid to decide global turbo state based on -the CPU 0. CPU 0 max turbo P-state can be same as max non turbo P-state, -but for other CPUs this may not be true. - -There is no guarantee that max P-state limits are same for every CPU. This -is possible that during fusing max P-state for a CPU is constrained. Also -with the Intel Speed Select performance profile, CPU 0 may not be present -in all profiles. In this case the max non turbo and turbo P-state can be -set to the lowest possible P-state by the hardware when switched to -such profile. Since max non turbo and turbo P-state is same, -global.turbo_disabled flag will be set. - -Once global.turbo_disabled is set, any scaling max and min frequency -update for any CPU will result in its max P-state constrained to the max -non turbo P-state. - -Hence remove the check of max non turbo P-state equal to max turbo P-state -of CPU 0 to set global turbo disabled flag. - -Signed-off-by: Srinivas Pandruvada -[ rjw: Subject edit ] -Signed-off-by: Rafael J. Wysocki -Stable-dep-of: ac4e04d9e378 ("cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode") -Signed-off-by: Sasha Levin ---- - drivers/cpufreq/intel_pstate.c | 6 +----- - 1 file changed, 1 insertion(+), 5 deletions(-) - -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index 06302eaa3e942..764ecccdfa8ad 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -487,13 +487,9 @@ static int intel_pstate_get_cppc_guranteed(int cpu) - static inline void update_turbo_state(void) - { - u64 misc_en; -- struct cpudata *cpu; - -- cpu = all_cpu_data[0]; - rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); -- global.turbo_disabled = -- (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE || -- cpu->pstate.max_pstate == cpu->pstate.turbo_pstate); -+ global.turbo_disabled = misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE; - } - - static int min_perf_pct_min(void) --- -2.39.5 - diff --git a/queue-5.4/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch b/queue-5.4/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch deleted file mode 100644 index 51a838a0d4..0000000000 --- a/queue-5.4/cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 2a8823c91429672fd1e5242c38c8389bdeca9299 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Tue, 29 Apr 2025 14:07:11 -0700 -Subject: cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode - -From: Srinivas Pandruvada - -[ Upstream commit ac4e04d9e378f5aa826c2406ad7871ae1b6a6fb9 ] - -When turbo mode is unavailable on a Skylake-X system, executing the -command: - - # echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo - -results in an unchecked MSR access error: - - WRMSR to 0x199 (attempted to write 0x0000000100001300). - -This issue was reproduced on an OEM (Original Equipment Manufacturer) -system and is not a common problem across all Skylake-X systems. - -This error occurs because the MSR 0x199 Turbo Engage Bit (bit 32) is set -when turbo mode is disabled. The issue arises when intel_pstate fails to -detect that turbo mode is disabled. Here intel_pstate relies on -MSR_IA32_MISC_ENABLE bit 38 to determine the status of turbo mode. -However, on this system, bit 38 is not set even when turbo mode is -disabled. - -According to the Intel Software Developer's Manual (SDM), the BIOS sets -this bit during platform initialization to enable or disable -opportunistic processor performance operations. Logically, this bit -should be set in such cases. However, the SDM also specifies that "OS -and applications must use CPUID leaf 06H to detect processors with -opportunistic processor performance operations enabled." - -Therefore, in addition to checking MSR_IA32_MISC_ENABLE bit 38, verify -that CPUID.06H:EAX[1] is 0 to accurately determine if turbo mode is -disabled. - -Fixes: 4521e1a0ce17 ("cpufreq: intel_pstate: Reflect current no_turbo state correctly") -Signed-off-by: Srinivas Pandruvada -Cc: All applicable -Signed-off-by: Rafael J. Wysocki -Signed-off-by: Sasha Levin ---- - drivers/cpufreq/intel_pstate.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c -index 28a038b2189f7..89e96d2da06c3 100644 ---- a/drivers/cpufreq/intel_pstate.c -+++ b/drivers/cpufreq/intel_pstate.c -@@ -488,6 +488,9 @@ static inline void update_turbo_state(void) - { - u64 misc_en; - -+ if (!cpu_feature_enabled(X86_FEATURE_IDA)) -+ return true; -+ - rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); - global.turbo_disabled = misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE; - } --- -2.39.5 - diff --git a/queue-5.4/series b/queue-5.4/series index 0b2662cb71..89b1cc2c70 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -28,8 +28,5 @@ usb-chipidea-imx-refine-the-error-handling-for-hsic.patch usb-chipidea-ci_hdrc_imx-use-dev_err_probe.patch usb-chipidea-ci_hdrc_imx-implement-usb_phy_init-erro.patch serial-msm-configure-correct-working-mode-before-sta.patch -cpufreq-intel_pstate-revise-global-turbo-disable-che.patch -cpufreq-intel_pstate-fold-intel_pstate_max_within_li.patch -cpufreq-intel_pstate-unchecked-msr-aceess-in-legacy-.patch arm64-dts-rockchip-fix-iface-clock-name-on-px30-iomm.patch iommu-amd-fix-potential-buffer-overflow-in-parse_ivr.patch -- 2.47.3