From b4c93258a9d4e567d6e74d47cfcbbac0ff542bfa Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 1 Oct 2025 10:53:07 +0200 Subject: [PATCH] target/riscv/kvm: Replace legacy cpu_physical_memory_read/write() calls MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Commit b7ecba0f6f6 ("docs/devel/loads-stores.rst: Document our various load and store APIs") mentioned cpu_physical_memory_*() methods are legacy, the replacement being address_space_*(). Since the SBI DBCN is handled within a vCPU context, use its default address space. Replace using the address space API. As with the previous implementation, ignore whether the memory accesses succeeded or failed. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Message-Id: <20251002145742.75624-4-philmd@linaro.org> --- target/riscv/kvm/kvm-cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 75ca3fb9fd..0dd0d59d41 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -36,6 +36,7 @@ #include "hw/pci/pci.h" #include "exec/memattrs.h" #include "system/address-spaces.h" +#include "system/memory.h" #include "hw/boards.h" #include "hw/irq.h" #include "hw/intc/riscv_imsic.h" @@ -1564,6 +1565,7 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs) static void kvm_riscv_handle_sbi_dbcn(CPUState *cs, struct kvm_run *run) { + const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED; g_autofree uint8_t *buf = NULL; RISCVCPU *cpu = RISCV_CPU(cs); target_ulong num_bytes; @@ -1602,9 +1604,9 @@ static void kvm_riscv_handle_sbi_dbcn(CPUState *cs, struct kvm_run *run) exit(1); } - cpu_physical_memory_write(addr, buf, ret); + address_space_write(cs->as, addr, attrs, buf, ret); } else { - cpu_physical_memory_read(addr, buf, num_bytes); + address_space_read(cs->as, addr, attrs, buf, num_bytes); ret = qemu_chr_fe_write_all(serial_hd(0)->be, buf, num_bytes); if (ret < 0) { -- 2.47.3