From b7d810f6120d65f0d514a9422810f382c3962f96 Mon Sep 17 00:00:00 2001 From: John Linn Date: Wed, 14 Jul 2010 13:04:34 -0600 Subject: [PATCH] Xilinx: ARM: Moved gem buffers and bds to bram to get around h/w problems The new peep design is not working in DDR yet for the GEM but it is working in BRAM. Once DDR is working with GEM this commit can be reverted. --- board/xilinx/dfe/xgmac.c | 8 ++++++++ cpu/arm_cortexa8/u-boot.lds | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/board/xilinx/dfe/xgmac.c b/board/xilinx/dfe/xgmac.c index 69d4b63d6c3..d4aa01b006c 100644 --- a/board/xilinx/dfe/xgmac.c +++ b/board/xilinx/dfe/xgmac.c @@ -33,10 +33,18 @@ int Xgmac_phy_mgmt_idle(XEmacPss * EmacPssInstancePtr); /* * Aligned memory segments to be used for buffer descriptors */ +#define BRAM_BUFFERS +#ifdef BRAM_BUFFERS +static XEmacPss_Bd RxBdSpace[RXBD_CNT] __attribute__ ((section (".bram_buffers"))); +static XEmacPss_Bd TxBdSpace[TXBD_CNT] __attribute__ ((section (".bram_buffers"))); +static char RxBuffers[RXBD_CNT * XEMACPSS_RX_BUF_SIZE] __attribute__ ((section (".bram_buffers"))); +static uchar data_buffer[XEMACPSS_RX_BUF_SIZE] __attribute__ ((section (".bram_buffers"))); +#else static XEmacPss_Bd RxBdSpace[RXBD_CNT]; static XEmacPss_Bd TxBdSpace[TXBD_CNT]; static char RxBuffers[RXBD_CNT * XEMACPSS_RX_BUF_SIZE]; static uchar data_buffer[XEMACPSS_RX_BUF_SIZE]; +#endif static struct { u8 initialized; diff --git a/cpu/arm_cortexa8/u-boot.lds b/cpu/arm_cortexa8/u-boot.lds index 4f1711cca00..399f63c9509 100644 --- a/cpu/arm_cortexa8/u-boot.lds +++ b/cpu/arm_cortexa8/u-boot.lds @@ -55,4 +55,8 @@ SECTIONS __bss_start = .; .bss : { *(.bss) } _end = .; + + . = 0xFFFE0000; + . = ALIGN(4); + .bram_buffers (NOLOAD) : { *(.bram_buffers) } } -- 2.47.3