From bf47aeba22a2b0c5b383e12670e170b73a7458e1 Mon Sep 17 00:00:00 2001
From: Jagan <jaganna@xilinx.com>
Date: Tue, 29 May 2012 18:47:02 +0530
Subject: [PATCH] Xilinx: ARM: Renamed legacy pss with ps, including files
 names

This patch is a part of cleanup activity.

Signed-off-by: Jagan <jaganna@xilinx.com>
---
 board/xilinx/zynq_common/Makefile             |  10 +-
 board/xilinx/zynq_common/pele_qspi.c          |   8 +-
 .../zynq_common/{xemacpss.c => xemacps.c}     |   7 +-
 .../zynq_common/{xemacpss.h => xemacps.h}     |  23 +-
 .../{xemacpss_bd.h => xemacps_bd.h}           |   3 +-
 .../{xemacpss_bdring.c => xemacps_bdring.c}   |  11 +-
 .../{xemacpss_bdring.h => xemacps_bdring.h}   |   5 +-
 .../{xemacpss_control.c => xemacps_control.c} |  13 +-
 .../zynq_common/{xemacpss_g.c => xemacps_g.c} |   7 +-
 .../{xemacpss_hw.h => xemacps_hw.h}           |   7 +-
 .../{xemacpss_sinit.c => xemacps_sinit.c}     |   5 +-
 board/xilinx/zynq_common/xgmac.c              |   2 +-
 .../{xilinx_nandpss.c => xilinx_nandps.c}     | 236 +++++++--------
 .../{xilinx_qspipss.c => xilinx_qspips.c}     | 282 +++++++++---------
 .../{xilinx_qspipss.h => xilinx_qspips.h}     |  12 +-
 board/xilinx/zynq_common/xparameters.h        |   2 +-
 ...parameters_pss_zynq.h => xparameters_ps.h} |   3 +-
 ...parameters_pss.h => xparameters_ps_zynq.h} |   3 +-
 board/xilinx/zynq_common/xparameters_zynq.h   |   2 +-
 drivers/rtc/Makefile                          |   2 +-
 drivers/rtc/{xpssrtc.c => xpsrtc.c}           |   0
 drivers/serial/Makefile                       |   2 +-
 .../{serial_xpssuart.c => serial_xpsuart.c}   |   2 +-
 .../{serial_xpssuart.h => serial_xpsuart.h}   |   0
 24 files changed, 319 insertions(+), 328 deletions(-)
 rename board/xilinx/zynq_common/{xemacpss.c => xemacps.c} (98%)
 rename board/xilinx/zynq_common/{xemacpss.h => xemacps.h} (97%)
 rename board/xilinx/zynq_common/{xemacpss_bd.h => xemacps_bd.h} (99%)
 rename board/xilinx/zynq_common/{xemacpss_bdring.c => xemacps_bdring.c} (99%)
 rename board/xilinx/zynq_common/{xemacpss_bdring.h => xemacps_bdring.h} (98%)
 rename board/xilinx/zynq_common/{xemacpss_control.c => xemacps_control.c} (98%)
 rename board/xilinx/zynq_common/{xemacpss_g.c => xemacps_g.c} (96%)
 rename board/xilinx/zynq_common/{xemacpss_hw.h => xemacps_hw.h} (99%)
 rename board/xilinx/zynq_common/{xemacpss_sinit.c => xemacps_sinit.c} (97%)
 rename board/xilinx/zynq_common/{xilinx_nandpss.c => xilinx_nandps.c} (84%)
 rename board/xilinx/zynq_common/{xilinx_qspipss.c => xilinx_qspips.c} (81%)
 rename board/xilinx/zynq_common/{xilinx_qspipss.h => xilinx_qspips.h} (81%)
 rename board/xilinx/zynq_common/{xparameters_pss_zynq.h => xparameters_ps.h} (99%)
 rename board/xilinx/zynq_common/{xparameters_pss.h => xparameters_ps_zynq.h} (99%)
 rename drivers/rtc/{xpssrtc.c => xpsrtc.c} (100%)
 rename drivers/serial/{serial_xpssuart.c => serial_xpsuart.c} (98%)
 rename drivers/serial/{serial_xpssuart.h => serial_xpsuart.h} (100%)

diff --git a/board/xilinx/zynq_common/Makefile b/board/xilinx/zynq_common/Makefile
index 8e912055bb4..e792c56c05d 100644
--- a/board/xilinx/zynq_common/Makefile
+++ b/board/xilinx/zynq_common/Makefile
@@ -31,11 +31,11 @@ LIB	= $(obj)lib$(BOARD).o
 COBJS-y	:= board.o \
 	   ../common/xbasic_types.o
 
-COBJS-$(CONFIG_CMD_NET) += xemacpss_g.o xemacpss_control.o \
-		xemacpss_sinit.o xemacpss_bdring.o \
-		xemacpss.o xgmac.o
-COBJS-$(CONFIG_CMD_SPI) += pele_qspi.o xilinx_qspipss.o
-COBJS-$(CONFIG_CMD_NAND) += xilinx_nandpss.o
+COBJS-$(CONFIG_CMD_NET) += xemacps_g.o xemacps_control.o \
+		xemacps_sinit.o xemacps_bdring.o \
+		xemacps.o xgmac.o
+COBJS-$(CONFIG_CMD_SPI) += pele_qspi.o xilinx_qspips.o
+COBJS-$(CONFIG_CMD_NAND) += xilinx_nandps.o
 COBJS-$(CONFIG_CMD_MMC) += mmc.o
 
 COBJS	:= $(sort $(COBJS-y))
diff --git a/board/xilinx/zynq_common/pele_qspi.c b/board/xilinx/zynq_common/pele_qspi.c
index 6274bb9d6a5..9f61034c2ab 100644
--- a/board/xilinx/zynq_common/pele_qspi.c
+++ b/board/xilinx/zynq_common/pele_qspi.c
@@ -12,7 +12,7 @@
 
 #include <xparameters.h>
 
-#include "xilinx_qspipss.h"
+#include "xilinx_qspips.h"
 
 struct pele_spi_slave {
 	struct spi_slave  slave;
@@ -64,7 +64,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 		bus, cs, max_hz, mode);
 #endif
 
-	xqspipss_init_hw((void*)XPSS_QSPI_BASEADDR);
+	xqspips_init_hw((void *)XPSS_QSPI_BASEADDR);
 
 	pspi = malloc(sizeof(struct pele_spi_slave));
 	if (!pspi) {
@@ -80,7 +80,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	pspi->qspi.mode = mode;
 	pspi->qspi.chip_select = 0;
 	pspi->qspi.bits_per_word = 32;
-	xqspipss_setup_transfer(&pspi->qspi, NULL);
+	xqspips_setup_transfer(&pspi->qspi, NULL);
 
 	return &pspi->slave;
 }
@@ -155,7 +155,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 	transfer.bits_per_word = 32;
 	transfer.speed_hz = pspi->qspi.max_speed_hz;
 
-	xqspipss_transfer(&pspi->qspi, &transfer);
+	xqspips_transfer(&pspi->qspi, &transfer);
 
 	return 0;
 }
diff --git a/board/xilinx/zynq_common/xemacpss.c b/board/xilinx/zynq_common/xemacps.c
similarity index 98%
rename from board/xilinx/zynq_common/xemacpss.c
rename to board/xilinx/zynq_common/xemacps.c
index 8d6548a7d13..b28af0f1886 100644
--- a/board/xilinx/zynq_common/xemacpss.c
+++ b/board/xilinx/zynq_common/xemacps.c
@@ -1,4 +1,3 @@
-/* $Id: xemacpss.c,v 1.1.2.2 2009/07/07 22:54:36 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,10 +41,10 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacpss.c
+* @file xemacps.c
 *
 * The XEmacPss driver. Functions in this file are the minimum required functions
-* for this driver. See xemacpss.h for a detailed description of the driver.
+* for this driver. See xemacps.h for a detailed description of the driver.
 *
 * <pre>
 * MODIFICATION HISTORY:
@@ -58,7 +57,7 @@
 
 /***************************** Include Files *********************************/
 
-#include "xemacpss.h"
+#include "xemacps.h"
 
 /************************** Constant Definitions *****************************/
 
diff --git a/board/xilinx/zynq_common/xemacpss.h b/board/xilinx/zynq_common/xemacps.h
similarity index 97%
rename from board/xilinx/zynq_common/xemacpss.h
rename to board/xilinx/zynq_common/xemacps.h
index 05020f21fd7..c28630b1110 100644
--- a/board/xilinx/zynq_common/xemacpss.h
+++ b/board/xilinx/zynq_common/xemacps.h
@@ -1,4 +1,3 @@
-/* $Id: xemacpss.h,v 1.1.2.3 2009/07/29 20:05:30 wyang Exp $ */
 /*****************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,7 +41,7 @@
 /****************************************************************************/
 /**
  *
- * @file xemacpss.h
+ * @file xemacps.h
  *
  * The Xilinx Embedded Processor Block Ethernet driver.
  *
@@ -118,7 +117,7 @@
  *
  * This API requires the user to understand how the DMA operates. The
  * following paragraphs provide some explanation, but the user is encouraged
- * to read documentation in xemacpss_bdring.h as well as study example code
+ * to read documentation in xemacps_bdring.h as well as study example code
  * that accompanies this driver.
  *
  * The API is designed to get BDs to and from the DMA engine in the most
@@ -175,7 +174,7 @@
  * <b>Alignment & Data Cache Restrictions</b>
  *
  * Due to the design of the hardware, all RX buffers, BDs need to be 4-byte
- * aligned. Please reference xemacpss_bd.h for cache related macros.
+ * aligned. Please reference xemacps_bd.h for cache related macros.
  *
  * DMA Tx:
  *
@@ -288,9 +287,9 @@ extern "C" {
 
 #include "xbasic_types.h"
 #include "xstatus.h"
-#include "xemacpss_hw.h"
-#include "xemacpss_bd.h"
-#include "xemacpss_bdring.h"
+#include "xemacps_hw.h"
+#include "xemacps_bd.h"
+#include "xemacps_bdring.h"
 #include "xparameters.h"
 
 /************************** Constant Definitions ****************************/
@@ -298,7 +297,7 @@ extern "C" {
 /*
  * Device information
  */
-#define XEMACPSS_DEVICE_NAME     "xemacpss"
+#define XEMACPSS_DEVICE_NAME     "xemacps"
 #define XEMACPSS_DEVICE_DESC     "Xilinx PSS 10/100/1000 MAC"
 
 /** @name Configuration options
@@ -430,7 +429,7 @@ extern "C" {
  * @param CallBackRef is user data assigned when the callback was set.
  *
  * @note
- * See xemacpss_hw.h for bitmasks definitions and the device hardware spec for
+ * See xemacps_hw.h for bitmasks definitions and the device hardware spec for
  * further information on their meaning.
  *
  */
@@ -632,7 +631,7 @@ typedef struct XEmacPss {
 /************************** Function Prototypes *****************************/
 
 /*
- * Initialization functions in xemacpss.c
+ * Initialization functions in xemacps.c
  */
 int XEmacPss_CfgInitialize(XEmacPss *InstancePtr, XEmacPss_Config *CfgPtr,
 			   u32 EffectiveAddress);
@@ -641,12 +640,12 @@ void XEmacPss_Stop(XEmacPss *InstancePtr);
 void XEmacPss_Reset(XEmacPss *InstancePtr);
 
 /*
- * Lookup configuration in xemacpss_sinit.c
+ * Lookup configuration in xemacps_sinit.c
  */
 XEmacPss_Config *XEmacPss_LookupConfig(u16 DeviceId);
 
 /*
- * Interrupt-related functions in xemacpss_intr.c
+ * Interrupt-related functions in xemacps_intr.c
  * DMA only and FIFO is not supported. This DMA does not support coalescing.
  */
 int XEmacPss_SetHandler(XEmacPss *InstancePtr, u32 HandlerType,
diff --git a/board/xilinx/zynq_common/xemacpss_bd.h b/board/xilinx/zynq_common/xemacps_bd.h
similarity index 99%
rename from board/xilinx/zynq_common/xemacpss_bd.h
rename to board/xilinx/zynq_common/xemacps_bd.h
index ba73059954a..74778b2c24d 100644
--- a/board/xilinx/zynq_common/xemacpss_bd.h
+++ b/board/xilinx/zynq_common/xemacps_bd.h
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_bd.h,v 1.1.2.1 2009/06/17 16:10:26 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,7 +41,7 @@
 /*****************************************************************************/
 /**
  *
- * @file xemacpss_bd.h
+ * @file xemacps_bd.h
  *
  * This header provides operations to manage buffer descriptors in support
  * of scatter-gather DMA.
diff --git a/board/xilinx/zynq_common/xemacpss_bdring.c b/board/xilinx/zynq_common/xemacps_bdring.c
similarity index 99%
rename from board/xilinx/zynq_common/xemacpss_bdring.c
rename to board/xilinx/zynq_common/xemacps_bdring.c
index 5c6c61eaf2a..8224d62e9c3 100644
--- a/board/xilinx/zynq_common/xemacpss_bdring.c
+++ b/board/xilinx/zynq_common/xemacps_bdring.c
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_bdring.c,v 1.1.2.2 2009/08/04 23:30:32 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacpss_bdring.c
+* @file xemacps_bdring.c
 *
 * This file implements buffer descriptor ring related functions.
 *
@@ -59,9 +58,9 @@
 
 #include "xstatus.h"
 //#include "xcache.h"
-#include "xemacpss_hw.h"
-#include "xemacpss_bd.h"
-#include "xemacpss_bdring.h"
+#include "xemacps_hw.h"
+#include "xemacps_bd.h"
+#include "xemacps_bdring.h"
 
 /************************** Constant Definitions *****************************/
 
@@ -416,7 +415,7 @@ int XEmacPss_BdRingClone(XEmacPss_BdRing * RingPtr, XEmacPss_Bd * SrcBdPtr,
  *        XEmacPss_BdRingToHw(MyRingPtr, NumBd1, MySet1);
  * </pre>
  *
- * Use the API defined in xemacpss_bd.h to modify individual BDs. Traversal
+ * Use the API defined in xemacps_bd.h to modify individual BDs. Traversal
  * of the BD set can be done using XEmacPss_BdRingNext() and
  * XEmacPss_BdRingPrev().
  *
diff --git a/board/xilinx/zynq_common/xemacpss_bdring.h b/board/xilinx/zynq_common/xemacps_bdring.h
similarity index 98%
rename from board/xilinx/zynq_common/xemacpss_bdring.h
rename to board/xilinx/zynq_common/xemacps_bdring.h
index ed7777c8c3b..9beaae6a91f 100644
--- a/board/xilinx/zynq_common/xemacpss_bdring.h
+++ b/board/xilinx/zynq_common/xemacps_bdring.h
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_bdring.h,v 1.1.2.1 2009/06/17 16:10:26 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacpss_bdring.h
+* @file xemacps_bdring.h
 *
 * The Xiline EmacPss Buffer Descriptor ring driver. This is part of EmacPss
 * DMA functionalities.
@@ -214,7 +213,7 @@ typedef struct {
 /************************** Function Prototypes ******************************/
 
 /*
- * Scatter gather DMA related functions in xemacpss_bdring.c
+ * Scatter gather DMA related functions in xemacps_bdring.c
  */
 int XEmacPss_BdRingCreate(XEmacPss_BdRing * RingPtr, u32 PhysAddr,
 			  u32 VirtAddr, u32 Alignment, unsigned BdCount);
diff --git a/board/xilinx/zynq_common/xemacpss_control.c b/board/xilinx/zynq_common/xemacps_control.c
similarity index 98%
rename from board/xilinx/zynq_common/xemacpss_control.c
rename to board/xilinx/zynq_common/xemacps_control.c
index f1ae479a0b5..1f605cb3d0a 100644
--- a/board/xilinx/zynq_common/xemacpss_control.c
+++ b/board/xilinx/zynq_common/xemacps_control.c
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_control.c,v 1.1.2.2 2009/07/07 22:54:36 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,10 +41,10 @@
 /*****************************************************************************/
 /**
  *
- * @file xemacpss_control.c
+ * @file xemacps_control.c
  *
  * Functions in this file implement general purpose command and control related
- * functionality. See xemacpss.h for a detailed description of the driver.
+ * functionality. See xemacps.h for a detailed description of the driver.
  *
  * <pre>
  * MODIFICATION HISTORY:
@@ -58,7 +57,7 @@
 
 /***************************** Include Files *********************************/
 
-#include "xemacpss.h"
+#include "xemacps.h"
 
 /************************** Constant Definitions *****************************/
 
@@ -372,7 +371,7 @@ int XEmacPss_SetTypeIdCheck(XEmacPss *InstancePtr, u32 Id_Check, u8 Index)
  * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
  *
  * @note
- * See xemacpss.h for a description of the available options.
+ * See xemacps.h for a description of the available options.
  *
  *****************************************************************************/
 int XEmacPss_SetOptions(XEmacPss *InstancePtr, u32 Options)
@@ -507,7 +506,7 @@ int XEmacPss_SetOptions(XEmacPss *InstancePtr, u32 Options)
  * - XST_DEVICE_IS_STARTED if the device has not yet been stopped
  *
  * @note
- * See xemacpss.h for a description of the available options.
+ * See xemacps.h for a description of the available options.
  *
  *****************************************************************************/
 int XEmacPss_ClearOptions(XEmacPss *InstancePtr, u32 Options)
@@ -639,7 +638,7 @@ int XEmacPss_ClearOptions(XEmacPss *InstancePtr, u32 Options)
  * as a set opion.
  *
  * @note
- * See xemacpss.h for a description of the available options.
+ * See xemacps.h for a description of the available options.
  *
  *****************************************************************************/
 u32 XEmacPss_GetOptions(XEmacPss *InstancePtr)
diff --git a/board/xilinx/zynq_common/xemacpss_g.c b/board/xilinx/zynq_common/xemacps_g.c
similarity index 96%
rename from board/xilinx/zynq_common/xemacpss_g.c
rename to board/xilinx/zynq_common/xemacps_g.c
index c08811dd8d7..df561a95a45 100644
--- a/board/xilinx/zynq_common/xemacpss_g.c
+++ b/board/xilinx/zynq_common/xemacps_g.c
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_g.c,v 1.1.2.1 2009/06/17 16:10:26 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacpss_g.c
+* @file xemacps_g.c
 *
 * This file contains a configuration table that specifies the configuration of
 * ethernet devices in the system.
@@ -67,7 +66,7 @@
 /***************************** Include Files *********************************/
 
 //#include "xparameters.h"
-#include "xemacpss.h"
+#include "xemacps.h"
 
 /************************** Constant Definitions *****************************/
 
@@ -81,7 +80,7 @@
 /************************** Variable Prototypes ******************************/
 
 /*
- * The configuration table for emacpss device
+ * The configuration table for emacps device
  */
 
 XEmacPss_Config XEmacPss_ConfigTable[XPAR_XEMACPSS_NUM_INSTANCES] = {
diff --git a/board/xilinx/zynq_common/xemacpss_hw.h b/board/xilinx/zynq_common/xemacps_hw.h
similarity index 99%
rename from board/xilinx/zynq_common/xemacpss_hw.h
rename to board/xilinx/zynq_common/xemacps_hw.h
index c14660d8c73..24b3442cf01 100644
--- a/board/xilinx/zynq_common/xemacpss_hw.h
+++ b/board/xilinx/zynq_common/xemacps_hw.h
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_hw.h,v 1.1.2.1 2009/06/17 16:10:26 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,11 +41,11 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacpss_hw.h
+* @file xemacps_hw.h
 *
 * This header file contains identifiers and low-level driver functions (or
 * macros) that can be used to access the PSS Ethernet MAC (XEmacPss) device.
-* High-level driver functions are defined in xemacpss.h.
+* High-level driver functions are defined in xemacps.h.
 *
 * @note
 *
@@ -529,7 +528,7 @@ typedef enum { XMDC_DIV_8 = 0, XMDC_DIV_16, XMDC_DIV_32, XMDC_DIV_48,
  * Define appropriate I/O access method to mempry mapped I/O or other
  * intarfce if necessary.
  */
-/* Defined in xemacpss_control.c*/
+/* Defined in xemacps_control.c*/
 void XIo_Out32(u32 OutAddress, u32 Value);
 u32 XIo_In32(u32 InAddress);
 
diff --git a/board/xilinx/zynq_common/xemacpss_sinit.c b/board/xilinx/zynq_common/xemacps_sinit.c
similarity index 97%
rename from board/xilinx/zynq_common/xemacpss_sinit.c
rename to board/xilinx/zynq_common/xemacps_sinit.c
index a2e7b568bc1..ede05535b30 100644
--- a/board/xilinx/zynq_common/xemacpss_sinit.c
+++ b/board/xilinx/zynq_common/xemacps_sinit.c
@@ -1,4 +1,3 @@
-/* $Id: xemacpss_sinit.c,v 1.1.2.1 2009/06/17 16:10:26 wyang Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved.
@@ -42,7 +41,7 @@
 /*****************************************************************************/
 /**
 *
-* @file xemacpss_sinit.c
+* @file xemacps_sinit.c
 *
 * This file contains lookup method by device ID when success, it returns
 * pointer to config table to be used to initialize the device.
@@ -60,7 +59,7 @@
 /***************************** Include Files *********************************/
 
 //#include "xparameters.h"
-#include "xemacpss.h"
+#include "xemacps.h"
 
 /************************** Constant Definitions *****************************/
 
diff --git a/board/xilinx/zynq_common/xgmac.c b/board/xilinx/zynq_common/xgmac.c
index 6a31b475812..618e9cdc8a2 100644
--- a/board/xilinx/zynq_common/xgmac.c
+++ b/board/xilinx/zynq_common/xgmac.c
@@ -6,7 +6,7 @@
 #include <miiphy.h>
 #include <net.h>
 
-#include "xemacpss.h"
+#include "xemacps.h"
 
 /************************ Forward function declaration **********************/
 
diff --git a/board/xilinx/zynq_common/xilinx_nandpss.c b/board/xilinx/zynq_common/xilinx_nandps.c
similarity index 84%
rename from board/xilinx/zynq_common/xilinx_nandpss.c
rename to board/xilinx/zynq_common/xilinx_nandps.c
index 25017712396..7bdf756bada 100644
--- a/board/xilinx/zynq_common/xilinx_nandpss.c
+++ b/board/xilinx/zynq_common/xilinx_nandps.c
@@ -143,20 +143,20 @@
 extern void XIo_Out32(u32 OutAddress, u32 Value);
 extern u32  XIo_In32(u32 InAddress);
 
-#define xnandpss_read32(addr)       XIo_In32((u32)(addr))
-#define xnandpss_write32(addr, val)	XIo_Out32((u32)(addr), (val))
+#define xnandps_read32(addr)       XIo_In32((u32)(addr))
+#define xnandps_write32(addr, val)	XIo_Out32((u32)(addr), (val))
 #define readl(addr)                 XIo_In32((u32)(addr))
 #define writel(val, addr)           XIo_Out32((u32)(addr), (val))
 
 
 /**
- * struct xnandpss_command_format - Defines NAND flash command format
+ * struct xnandps_command_format - Defines NAND flash command format
  * @start_cmd:		First cycle command (Start command)
  * @end_cmd:		Second cycle command (Last command)
  * @addr_cycles:	Number of address cycles required to send the address
  * @end_cmd_valid:	The second cycle command is valid for cmd or data phase
  **/
-struct xnandpss_command_format {
+struct xnandps_command_format {
 	int start_cmd;
 	int end_cmd;
 	u8 addr_cycles;
@@ -164,7 +164,7 @@ struct xnandpss_command_format {
 };
 
 /**
- * struct xnandpss_info - Defines the NAND flash driver instance
+ * struct xnandps_info - Defines the NAND flash driver instance
  * @chip:		NAND chip information structure
  * @mtd:		MTD information structure
  * @parts:		Pointer	to the mtd_partition structure
@@ -173,7 +173,7 @@ struct xnandpss_command_format {
  * @end_cmd_pending:	End command is pending
  * @end_cmd:		End command
  **/
-struct xnandpss_info {
+struct xnandps_info {
 #ifdef LINUX_ONLY_NOT_UBOOT
 	struct nand_chip	chip;
 	struct mtd_info		mtd;
@@ -195,7 +195,7 @@ struct xnandpss_info {
 /*
  * The NAND flash operations command format
  */
-static struct xnandpss_command_format xnandpss_commands[] __devinitdata = {
+static struct xnandps_command_format xnandps_commands[] __devinitdata = {
 	{NAND_CMD_READ0, NAND_CMD_READSTART, 5, XNANDPSS_CMD_PHASE},
 	{NAND_CMD_RNDOUT, NAND_CMD_RNDOUTSTART, 2, XNANDPSS_CMD_PHASE},
 	{NAND_CMD_READID, NAND_CMD_NONE, 1, NAND_CMD_NONE},
@@ -281,41 +281,41 @@ static struct nand_bbt_descr bbt_mirror_descr = {
 };
 
 /**
- * xnandpss_init_nand_flash - Initialize NAND controller
+ * xnandps_init_nand_flash - Initialize NAND controller
  * @smc_regs:	Virtual address of the NAND controller registers
  * @option:	Device property flags
  *
  * This function initializes the NAND flash interface on the NAND controller.
  **/
-static void xnandpss_init_nand_flash(void __iomem *smc_regs, int option)
+static void xnandps_init_nand_flash(void __iomem *smc_regs, int option)
 {
 	/* disable interrupts */
-	xnandpss_write32(smc_regs + XSMCPSS_MC_CLR_CONFIG, XNANDPSS_CLR_CONFIG);
+	xnandps_write32(smc_regs + XSMCPSS_MC_CLR_CONFIG, XNANDPSS_CLR_CONFIG);
 	/* Initialize the NAND interface by setting cycles and operation mode */
-	xnandpss_write32(smc_regs + XSMCPSS_MC_SET_CYCLES, XNANDPSS_SET_CYCLES);
+	xnandps_write32(smc_regs + XSMCPSS_MC_SET_CYCLES, XNANDPSS_SET_CYCLES);
 	if (option & NAND_BUSWIDTH_16)
-		xnandpss_write32(smc_regs + XSMCPSS_MC_SET_OPMODE,
+		xnandps_write32(smc_regs + XSMCPSS_MC_SET_OPMODE,
 				(XNANDPSS_SET_OPMODE | 0x1));
 	else
-		xnandpss_write32(smc_regs + XSMCPSS_MC_SET_OPMODE,
+		xnandps_write32(smc_regs + XSMCPSS_MC_SET_OPMODE,
 				XNANDPSS_SET_OPMODE);
-	xnandpss_write32(smc_regs + XSMCPSS_MC_DIRECT_CMD, XNANDPSS_DIRECT_CMD);
+	xnandps_write32(smc_regs + XSMCPSS_MC_DIRECT_CMD, XNANDPSS_DIRECT_CMD);
 
 	/* Wait till the ECC operation is complete */
-	while ( (xnandpss_read32(smc_regs + XSMCPSS_ECC_STATUS_OFFSET(
+	while ( (xnandps_read32(smc_regs + XSMCPSS_ECC_STATUS_OFFSET(
 			XSMCPSS_ECC_IF1_OFFSET))) & XNANDPSS_ECC_BUSY)
 			;
 	/* Set the command1 and command2 register */
-	xnandpss_write32(smc_regs +
+	xnandps_write32(smc_regs +
 		(XSMCPSS_ECC_MEMCMD1_OFFSET(XSMCPSS_ECC_IF1_OFFSET)),
 		XNANDPSS_ECC_CMD1);
-	xnandpss_write32(smc_regs +
+	xnandps_write32(smc_regs +
 		(XSMCPSS_ECC_MEMCMD2_OFFSET(XSMCPSS_ECC_IF1_OFFSET)),
 		XNANDPSS_ECC_CMD2);
 }
 
 /**
- * xnandpss_calculate_hwecc - Calculate Hardware ECC
+ * xnandps_calculate_hwecc - Calculate Hardware ECC
  * @mtd:	Pointer to the mtd_info structure
  * @data:	Pointer to the page data
  * @ecc_code:	Pointer to the ECC buffer where ECC data needs to be stored
@@ -326,26 +326,26 @@ static void xnandpss_init_nand_flash(void __iomem *smc_regs, int option)
  * returns:	0 on success or error value on failure
  **/
 static int
-xnandpss_calculate_hwecc(struct mtd_info *mtd, const u8 *data, u8 *ecc_code)
+xnandps_calculate_hwecc(struct mtd_info *mtd, const u8 *data, u8 *ecc_code)
 {
-	struct xnandpss_info *xnand;
+	struct xnandps_info *xnand;
 	struct nand_chip *chip;
 	u32 ecc_value = 0;
 	u8 ecc_reg, ecc_byte;
 	u32 ecc_status;
 	
 	chip = (struct nand_chip *)mtd->priv;
-	xnand = (struct xnandpss_info *)chip->priv;
+	xnand = (struct xnandps_info *)chip->priv;
 
 	/* Wait till the ECC operation is complete */
 	do {
-		ecc_status = xnandpss_read32(xnand->smc_regs +
+		ecc_status = xnandps_read32(xnand->smc_regs +
 			XSMCPSS_ECC_STATUS_OFFSET(XSMCPSS_ECC_IF1_OFFSET));
 	} while (ecc_status & XNANDPSS_ECC_BUSY);
 
 	for (ecc_reg = 0; ecc_reg < 4; ecc_reg++) {
 		/* Read ECC value for each block */
-		ecc_value = (xnandpss_read32(xnand->smc_regs +
+		ecc_value = (xnandps_read32(xnand->smc_regs +
 			(XSMCPSS_ECC_VALUE0_OFFSET(XSMCPSS_ECC_IF1_OFFSET) +
 			(ecc_reg*4))));
 		ecc_status = (ecc_value >> 24) & 0xFF;
@@ -378,7 +378,7 @@ int onehot(unsigned short value)
 }
 
 /**
- * xnandpss_correct_data - ECC correction function
+ * xnandps_correct_data - ECC correction function
  * @mtd:	Pointer to the mtd_info structure
  * @buf:	Pointer to the page data
  * @read_ecc:	Pointer to the ECC value read from spare data area
@@ -390,7 +390,7 @@ int onehot(unsigned short value)
  *		1 if single bit error found and corrected.
  *		-1 if multiple ECC errors found.
  **/
-int xnandpss_correct_data(struct mtd_info *mtd, unsigned char *buf,
+int xnandps_correct_data(struct mtd_info *mtd, unsigned char *buf,
 			unsigned char *read_ecc, unsigned char *calc_ecc)
 {
 	unsigned char bit_addr;
@@ -426,13 +426,13 @@ int xnandpss_correct_data(struct mtd_info *mtd, unsigned char *buf,
 }
 
 /**
- * xnandpss_read_oob - [REPLACABLE] the most common OOB data read function
+ * xnandps_read_oob - [REPLACABLE] the most common OOB data read function
  * @mtd:	mtd info structure
  * @chip:	nand chip info structure
  * @page:	page number to read
  * @sndcmd:	flag whether to issue read command or not
  */
-static int xnandpss_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
+static int xnandps_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
 			int page, int sndcmd)
 {
 	unsigned long data_width = 4;
@@ -457,12 +457,12 @@ static int xnandpss_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
 }
 
 /**
- * xnandpss_write_oob - [REPLACABLE] the most common OOB data write function
+ * xnandps_write_oob - [REPLACABLE] the most common OOB data write function
  * @mtd:	mtd info structure
  * @chip:	nand chip info structure
  * @page:	page number to write
  */
-static int xnandpss_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
+static int xnandps_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
 			int page)
 {
 	int status = 0;
@@ -489,14 +489,14 @@ static int xnandpss_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
 }
 
 /**
- * xnandpss_read_page_raw - [Intern] read raw page data without ecc
+ * xnandps_read_page_raw - [Intern] read raw page data without ecc
  * @mtd:        mtd info structure
  * @chip:       nand chip info structure
  * @buf:        buffer to store read data
  * @page:       page number to read
  *
  */
-static int xnandpss_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+static int xnandps_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
 			      uint8_t *buf, int page)
 {
 	unsigned long data_width = 4;
@@ -518,13 +518,13 @@ static int xnandpss_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
 }
 
 /**
- * xnandpss_write_page_raw - [Intern] raw page write function
+ * xnandps_write_page_raw - [Intern] raw page write function
  * @mtd:        mtd info structure
  * @chip:       nand chip info structure
  * @buf:        data buffer
  *
  */
-static void xnandpss_write_page_raw(struct mtd_info *mtd,
+static void xnandps_write_page_raw(struct mtd_info *mtd,
 			struct nand_chip *chip, const uint8_t *buf)
 {
 	unsigned long data_width = 4;
@@ -553,7 +553,7 @@ static void xnandpss_write_page_raw(struct mtd_info *mtd,
  *
  * This functions writes data and hardware generated ECC values in to the page.
  */
-void xnandpss_write_page_hwecc(struct mtd_info *mtd,
+void xnandps_write_page_hwecc(struct mtd_info *mtd,
 				struct nand_chip *chip, const uint8_t *buf)
 {
 	int i, eccsize = chip->ecc.size;
@@ -603,12 +603,12 @@ void xnandpss_write_page_hwecc(struct mtd_info *mtd,
 }
 
 /**
- * xnandpss_write_page_swecc - [REPLACABLE] software ecc based page write function
+ * xnandps_write_page_swecc - [REPLACABLE] software ecc based page write function
  * @mtd:	mtd info structure
  * @chip:	nand chip info structure
  * @buf:	data buffer
  */
-static void xnandpss_write_page_swecc(struct mtd_info *mtd,
+static void xnandps_write_page_swecc(struct mtd_info *mtd,
 						struct nand_chip *chip, const uint8_t *buf)
 {
 	int i, eccsize = chip->ecc.size;
@@ -640,7 +640,7 @@ static void xnandpss_write_page_swecc(struct mtd_info *mtd,
  *
  * returns:	0 always and updates ECC operation status in to MTD structure
  */
-int xnandpss_read_page_hwecc(struct mtd_info *mtd,
+int xnandps_read_page_hwecc(struct mtd_info *mtd,
 				struct nand_chip *chip, uint8_t *buf, int page)
 {
 	int i, stat, eccsize = chip->ecc.size;
@@ -706,13 +706,13 @@ int xnandpss_read_page_hwecc(struct mtd_info *mtd,
 }
 
 /**
- * xnandpss_read_page_swecc - [REPLACABLE] software ecc based page read function
+ * xnandps_read_page_swecc - [REPLACABLE] software ecc based page read function
  * @mtd:	mtd info structure
  * @chip:	nand chip info structure
  * @buf:	buffer to store read data
  * @page:	page number to read
  */
-static int xnandpss_read_page_swecc(struct mtd_info *mtd,
+static int xnandps_read_page_swecc(struct mtd_info *mtd,
 				struct nand_chip *chip, uint8_t *buf, int page)
 {
 	int i, eccsize = chip->ecc.size;
@@ -747,31 +747,31 @@ static int xnandpss_read_page_swecc(struct mtd_info *mtd,
 }
 
 /**
- * xnandpss_select_chip - Select the flash device
+ * xnandps_select_chip - Select the flash device
  * @mtd:	Pointer to the mtd_info structure
  * @chip:	Chip number to be selected
  *
  * This function is empty as the NAND controller handles chip select line
  * internally based on the chip address passed in command and data phase.
  **/
-static void xnandpss_select_chip(struct mtd_info *mtd, int chip)
+static void xnandps_select_chip(struct mtd_info *mtd, int chip)
 {
 	return;
 }
 
 /**
- * xnandpss_cmd_function - Send command to NAND device
+ * xnandps_cmd_function - Send command to NAND device
  * @mtd:	Pointer to the mtd_info structure
  * @command:	The command to be sent to the flash device
  * @column:	The column address for this command, -1 if none
  * @page_addr:	The page address for this command, -1 if none
  */
-static void xnandpss_cmd_function(struct mtd_info *mtd, unsigned int command,
+static void xnandps_cmd_function(struct mtd_info *mtd, unsigned int command,
 			    int column, int page_addr)
 {
 	struct nand_chip *chip = mtd->priv;
-	struct xnandpss_command_format *curr_cmd = NULL;
-	struct xnandpss_info *xnand;
+	struct xnandps_command_format *curr_cmd = NULL;
+	struct xnandps_info *xnand;
 	void *cmd_addr;
 	unsigned long cmd_data = 0;
 	unsigned long cmd_phase_addr = 0;
@@ -780,7 +780,7 @@ static void xnandpss_cmd_function(struct mtd_info *mtd, unsigned int command,
 	unsigned long end_cmd_valid = 0;
 	unsigned long i;
 
-	xnand = (struct xnandpss_info *)chip->priv;
+	xnand = (struct xnandps_info *)chip->priv;
 	if (xnand->end_cmd_pending) {
 		/* Check for end command if this command request is same as the
 		 * pending command then return */
@@ -799,16 +799,16 @@ static void xnandpss_cmd_function(struct mtd_info *mtd, unsigned int command,
 	}
 
 	/* Get the command format */
-	for (i = 0; (xnandpss_commands[i].start_cmd != NAND_CMD_NONE ||
-		xnandpss_commands[i].end_cmd != NAND_CMD_NONE); i++) {
-		if (command == xnandpss_commands[i].start_cmd)
-			curr_cmd = &xnandpss_commands[i];
+	for (i = 0; (xnandps_commands[i].start_cmd != NAND_CMD_NONE ||
+		xnandps_commands[i].end_cmd != NAND_CMD_NONE); i++) {
+		if (command == xnandps_commands[i].start_cmd)
+			curr_cmd = &xnandps_commands[i];
 	}
 	if (curr_cmd == NULL)
 		return;
 
 	/* Clear interrupt */
-	xnandpss_write32((xnand->smc_regs + XSMCPSS_MC_CLR_CONFIG), (1 << 4));
+	xnandps_write32((xnand->smc_regs + XSMCPSS_MC_CLR_CONFIG), (1 << 4));
 
 	/* Get the command phase address */
 	if (curr_cmd->end_cmd_valid == XNANDPSS_CMD_PHASE)
@@ -852,7 +852,7 @@ static void xnandpss_cmd_function(struct mtd_info *mtd, unsigned int command,
 			cmd_data |= page_addr << 16;
 			/* Another address cycle for devices > 128MiB */
 			if (chip->chipsize > (128 << 20)) {
-				xnandpss_write32(cmd_addr, cmd_data);
+				xnandps_write32(cmd_addr, cmd_data);
 				cmd_data = (page_addr >> 16);
 			}
 		} else
@@ -870,7 +870,7 @@ static void xnandpss_cmd_function(struct mtd_info *mtd, unsigned int command,
 	} else
 		;
 
-	xnandpss_write32(cmd_addr, cmd_data);
+	xnandps_write32(cmd_addr, cmd_data);
 
 	if (curr_cmd->end_cmd_valid) {
 		xnand->end_cmd = curr_cmd->end_cmd;
@@ -887,13 +887,13 @@ static void xnandpss_cmd_function(struct mtd_info *mtd, unsigned int command,
 }
 
 /**
- * xnandpss_read_buf - read chip data into buffer
+ * xnandps_read_buf - read chip data into buffer
  * @mtd:        MTD device structure
  * @buf:        buffer to store date
  * @len:        number of bytes to read
  *
  */
-void xnandpss_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+void xnandps_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 {
 	int i;
 	struct nand_chip *chip = mtd->priv;
@@ -905,13 +905,13 @@ void xnandpss_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 }
 
 /**
- * xnandpss_write_buf - write buffer to chip
+ * xnandps_write_buf - write buffer to chip
  * @mtd:        MTD device structure
  * @buf:        data buffer
  * @len:        number of bytes to write
  *
  */
-void xnandpss_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+void xnandps_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 {
 	int i;
 	struct nand_chip *chip = mtd->priv;
@@ -923,13 +923,13 @@ void xnandpss_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 }
 
 /**
- * xnandpss_verify_buf - Verify chip data against buffer
+ * xnandps_verify_buf - Verify chip data against buffer
  * @mtd:        MTD device structure
  * @buf:        buffer containing the data to compare
  * @len:        number of bytes to compare
  *
  */
-static int xnandpss_verify_buf(struct mtd_info *mtd, const uint8_t *buf,
+static int xnandps_verify_buf(struct mtd_info *mtd, const uint8_t *buf,
 				int len)
 {
 	int i;
@@ -951,31 +951,31 @@ static int xnandpss_verify_buf(struct mtd_info *mtd, const uint8_t *buf,
 }
 
 /**
- * xnandpss_device_ready - Check device ready/busy line
+ * xnandps_device_ready - Check device ready/busy line
  * @mtd:	Pointer to the mtd_info structure
  *
  * returns:	0 on busy or 1 on ready state
  **/
-static int xnandpss_device_ready(struct mtd_info *mtd)
+static int xnandps_device_ready(struct mtd_info *mtd)
 {
-	struct xnandpss_info *xnand;
+	struct xnandps_info *xnand;
 	struct nand_chip *chip;
 	unsigned long status;
 
 	chip = (struct nand_chip *)mtd->priv;
-	xnand = (struct xnandpss_info *)chip->priv;
+	xnand = (struct xnandps_info *)chip->priv;
 
 	/* Check the raw_int_status1 bit */
-	status = xnandpss_read32(xnand->smc_regs + XSMCPSS_MC_STATUS) & 0x40;
+	status = xnandps_read32(xnand->smc_regs + XSMCPSS_MC_STATUS) & 0x40;
 	/* Clear the interrupt condition */
 	if (status)
-		xnandpss_write32((xnand->smc_regs + XSMCPSS_MC_CLR_CONFIG),
+		xnandps_write32((xnand->smc_regs + XSMCPSS_MC_CLR_CONFIG),
 					(1<<4));
 	return status ? 1 : 0;
 }
 
 /**
- * xnandpss_probe - Probe method for the NAND driver
+ * xnandps_probe - Probe method for the NAND driver
  * @pdev:	Pointer to the platform_device structure
  *
  * This function initializes the driver data structures and the hardware.
@@ -983,12 +983,12 @@ static int xnandpss_device_ready(struct mtd_info *mtd)
  * returns:	0 on success or error value on failure
  **/
 #ifdef LINUX_ONLY_NOT_UBOOT
-static int __init xnandpss_probe(struct platform_device *pdev)
+static int __init xnandps_probe(struct platform_device *pdev)
 #else
 int board_nand_init(struct nand_chip *nand_chip)
 #endif
 {
-	struct xnandpss_info *xnand;
+	struct xnandps_info *xnand;
 	struct mtd_info *mtd;
 #ifdef LINUX_ONLY_NOT_UBOOT
 	struct nand_chip *nand_chip;
@@ -1010,10 +1010,10 @@ int board_nand_init(struct nand_chip *nand_chip)
 	int ez_nand_supported = 0;
 
 #ifdef LINUX_ONLY_NOT_UBOOT
-	xnand = kzalloc(sizeof(struct xnandpss_info), GFP_KERNEL);
+	xnand = kzalloc(sizeof(struct xnandps_info), GFP_KERNEL);
 #else
-	xnand = malloc(sizeof(struct xnandpss_info));
-	memset(xnand, 0, sizeof(struct xnandpss_info));
+	xnand = malloc(sizeof(struct xnandps_info));
+	memset(xnand, 0, sizeof(struct xnandps_info));
 #endif
 	if (!xnand) {
 		dev_err(&pdev->dev, "failed to allocate device structure.\n");
@@ -1088,18 +1088,18 @@ int board_nand_init(struct nand_chip *nand_chip)
 	nand_chip->IO_ADDR_W = xnand->nand_base;
 
 	/* Set the driver entry points for MTD */
-	nand_chip->cmdfunc = xnandpss_cmd_function;
+	nand_chip->cmdfunc = xnandps_cmd_function;
 	//nand_chip->dev_ready = NULL;
-	nand_chip->dev_ready = xnandpss_device_ready;
-	nand_chip->select_chip = xnandpss_select_chip;
+	nand_chip->dev_ready = xnandps_device_ready;
+	nand_chip->select_chip = xnandps_select_chip;
 
 	/* If we don't set this delay driver sets 20us by default */
 	nand_chip->chip_delay = 30;
 
 	/* Buffer read/write routines */
-	nand_chip->read_buf = xnandpss_read_buf;
-	nand_chip->write_buf = xnandpss_write_buf;
-	nand_chip->verify_buf = xnandpss_verify_buf;
+	nand_chip->read_buf = xnandps_read_buf;
+	nand_chip->write_buf = xnandps_write_buf;
+	nand_chip->verify_buf = xnandps_verify_buf;
 
 	/* Set the device option and flash width */
 #ifdef LINUX_ONLY_NOT_UBOOT
@@ -1114,7 +1114,7 @@ int board_nand_init(struct nand_chip *nand_chip)
 #endif
 
 	/* Initialize the NAND flash interface on NAND controller */
-	xnandpss_init_nand_flash(xnand->smc_regs, nand_chip->options);
+	xnandps_init_nand_flash(xnand->smc_regs, nand_chip->options);
 
 	/* first scan to find the device and get the page size */
 	if (nand_scan_ident(mtd, 1, NULL)) {
@@ -1156,22 +1156,22 @@ int board_nand_init(struct nand_chip *nand_chip)
 
 	if (ondie_ecc_enabled || ez_nand_supported) {
 		/* bypass the controller ECC block */
-		ecc_cfg = xnandpss_read32(xnand->smc_regs +
+		ecc_cfg = xnandps_read32(xnand->smc_regs +
 			XSMCPSS_ECC_MEMCFG_OFFSET(XSMCPSS_ECC_IF1_OFFSET));
 		ecc_cfg &= ~0xc;
-		xnandpss_write32(xnand->smc_regs +
+		xnandps_write32(xnand->smc_regs +
 			(XSMCPSS_ECC_MEMCFG_OFFSET(XSMCPSS_ECC_IF1_OFFSET)),
 			ecc_cfg);
 
 		/* The software ECC routines won't work with the
 				SMC controller */
 		nand_chip->ecc.mode = NAND_ECC_HW;
-		nand_chip->ecc.read_page = xnandpss_read_page_raw;
-		nand_chip->ecc.write_page = xnandpss_write_page_raw;
-		nand_chip->ecc.read_page_raw = xnandpss_read_page_raw;
-		nand_chip->ecc.write_page_raw = xnandpss_write_page_raw;
-		nand_chip->ecc.read_oob = xnandpss_read_oob;
-		nand_chip->ecc.write_oob = xnandpss_write_oob;
+		nand_chip->ecc.read_page = xnandps_read_page_raw;
+		nand_chip->ecc.write_page = xnandps_write_page_raw;
+		nand_chip->ecc.read_page_raw = xnandps_read_page_raw;
+		nand_chip->ecc.write_page_raw = xnandps_write_page_raw;
+		nand_chip->ecc.read_oob = xnandps_read_oob;
+		nand_chip->ecc.write_oob = xnandps_write_oob;
 		nand_chip->ecc.size = mtd->writesize;
 		nand_chip->ecc.bytes = 0;
 
@@ -1187,35 +1187,35 @@ int board_nand_init(struct nand_chip *nand_chip)
 		nand_chip->ecc.mode = NAND_ECC_HW;
 		nand_chip->ecc.size = XNANDPSS_ECC_SIZE;
 		nand_chip->ecc.bytes = 3;
-		nand_chip->ecc.calculate = xnandpss_calculate_hwecc;
-		nand_chip->ecc.correct = xnandpss_correct_data;
+		nand_chip->ecc.calculate = xnandps_calculate_hwecc;
+		nand_chip->ecc.correct = xnandps_correct_data;
 		nand_chip->ecc.hwctl = NULL;
-		nand_chip->ecc.read_page = xnandpss_read_page_hwecc;
-		nand_chip->ecc.write_page = xnandpss_write_page_hwecc;
-		nand_chip->ecc.read_page_raw = xnandpss_read_page_raw;
-		nand_chip->ecc.write_page_raw = xnandpss_write_page_raw;
-		nand_chip->ecc.read_oob = xnandpss_read_oob;
-		nand_chip->ecc.write_oob = xnandpss_write_oob;
+		nand_chip->ecc.read_page = xnandps_read_page_hwecc;
+		nand_chip->ecc.write_page = xnandps_write_page_hwecc;
+		nand_chip->ecc.read_page_raw = xnandps_read_page_raw;
+		nand_chip->ecc.write_page_raw = xnandps_write_page_raw;
+		nand_chip->ecc.read_oob = xnandps_read_oob;
+		nand_chip->ecc.write_oob = xnandps_write_oob;
 
 		switch (mtd->writesize) {
 		case 512:
 			ecc_page_size = 0x1;
 			/* Set the ECC memory config register */
-			xnandpss_write32(xnand->smc_regs +
+			xnandps_write32(xnand->smc_regs +
 				(XSMCPSS_ECC_MEMCFG_OFFSET(XSMCPSS_ECC_IF1_OFFSET)),
 				(XNANDPSS_ECC_CONFIG | ecc_page_size));
 			break;
 		case 1024:
 			ecc_page_size = 0x2;
 			/* Set the ECC memory config register */
-			xnandpss_write32(xnand->smc_regs +
+			xnandps_write32(xnand->smc_regs +
 				(XSMCPSS_ECC_MEMCFG_OFFSET(XSMCPSS_ECC_IF1_OFFSET)),
 				(XNANDPSS_ECC_CONFIG | ecc_page_size));
 			break;
 		case 2048:
 			ecc_page_size = 0x3;
 			/* Set the ECC memory config register */
-			xnandpss_write32(xnand->smc_regs +
+			xnandps_write32(xnand->smc_regs +
 				(XSMCPSS_ECC_MEMCFG_OFFSET(XSMCPSS_ECC_IF1_OFFSET)),
 				(XNANDPSS_ECC_CONFIG | ecc_page_size));
 			break;
@@ -1225,13 +1225,13 @@ int board_nand_init(struct nand_chip *nand_chip)
 			nand_chip->ecc.mode = NAND_ECC_HW;
 			nand_chip->ecc.calculate = nand_calculate_ecc;
 			nand_chip->ecc.correct = nand_correct_data;
-			nand_chip->ecc.read_page = xnandpss_read_page_swecc;
+			nand_chip->ecc.read_page = xnandps_read_page_swecc;
 			/* nand_chip->ecc.read_subpage = nand_read_subpage; */
-			nand_chip->ecc.write_page = xnandpss_write_page_swecc;
-			nand_chip->ecc.read_page_raw = xnandpss_read_page_raw;
-			nand_chip->ecc.write_page_raw = xnandpss_write_page_raw;
-			nand_chip->ecc.read_oob = xnandpss_read_oob;
-			nand_chip->ecc.write_oob = xnandpss_write_oob;
+			nand_chip->ecc.write_page = xnandps_write_page_swecc;
+			nand_chip->ecc.read_page_raw = xnandps_read_page_raw;
+			nand_chip->ecc.write_page_raw = xnandps_write_page_raw;
+			nand_chip->ecc.read_oob = xnandps_read_oob;
+			nand_chip->ecc.write_oob = xnandps_write_oob;
 			nand_chip->ecc.size = 256;
 			nand_chip->ecc.bytes = 3;
 			break;
@@ -1302,7 +1302,7 @@ out_free_data:
 }
 
 /**
- * xnandpss_remove - Remove method for the NAND driver
+ * xnandps_remove - Remove method for the NAND driver
  * @pdev:	Pointer to the platform_device structure
  *
  * This function is called if the driver module is being unloaded. It frees all
@@ -1311,9 +1311,9 @@ out_free_data:
  * returns:	0 on success or error value on failure
  **/
 #ifdef LINUX_ONLY_NOT_UBOOT
-static int __devexit xnandpss_remove(struct platform_device *pdev)
+static int __devexit xnandps_remove(struct platform_device *pdev)
 {
-	struct xnandpss_info *xnand = platform_get_drvdata(pdev);
+	struct xnandps_info *xnand = platform_get_drvdata(pdev);
 	struct resource *nand_res, *smc_res;
 
 	/* Release resources, unregister device */
@@ -1337,11 +1337,11 @@ static int __devexit xnandpss_remove(struct platform_device *pdev)
 }
 
 /*
- * xnandpss_driver - This structure defines the NAND subsystem platform driver
+ * xnandps_driver - This structure defines the NAND subsystem platform driver
  */
-static struct platform_driver xnandpss_driver = {
-	.probe		= xnandpss_probe,
-	.remove		= __devexit_p(xnandpss_remove),
+static struct platform_driver xnandps_driver = {
+	.probe		= xnandps_probe,
+	.remove		= __devexit_p(xnandps_remove),
 	.suspend	= NULL,
 	.resume		= NULL,
 	.driver		= {
@@ -1351,25 +1351,25 @@ static struct platform_driver xnandpss_driver = {
 };
 
 /**
- * xnandpss_init - NAND driver module initialization function
+ * xnandps_init - NAND driver module initialization function
  *
  * returns:	0 on success and error value on failure
  **/
-static int __init xnandpss_init(void)
+static int __init xnandps_init(void)
 {
-	return platform_driver_register(&xnandpss_driver);
+	return platform_driver_register(&xnandps_driver);
 }
 
 /**
- * xnandpss_exit - NAND driver module exit function
+ * xnandps_exit - NAND driver module exit function
  **/
-static void __exit xnandpss_exit(void)
+static void __exit xnandps_exit(void)
 {
-	platform_driver_unregister(&xnandpss_driver);
+	platform_driver_unregister(&xnandps_driver);
 }
 
-module_init(xnandpss_init);
-module_exit(xnandpss_exit);
+module_init(xnandps_init);
+module_exit(xnandps_exit);
 
 MODULE_AUTHOR("Xilinx, Inc.");
 MODULE_ALIAS("platform:" XNANDPSS_DRIVER_NAME);
diff --git a/board/xilinx/zynq_common/xilinx_qspipss.c b/board/xilinx/zynq_common/xilinx_qspips.c
similarity index 81%
rename from board/xilinx/zynq_common/xilinx_qspipss.c
rename to board/xilinx/zynq_common/xilinx_qspips.c
index 68a46d448b3..aaa7c47f58c 100755
--- a/board/xilinx/zynq_common/xilinx_qspipss.c
+++ b/board/xilinx/zynq_common/xilinx_qspips.c
@@ -4,7 +4,7 @@
  *
  * (c) 2011 Xilinx, Inc.
  *
- * based on Xilinx PSS SPI Driver (xspipss.c)
+ * based on Xilinx PSS SPI Driver (xspips.c)
  *
  * This program is free software; you can redistribute it and/or modify it under
  * the terms of the GNU General Public License version 2 as published by the
@@ -38,7 +38,7 @@
 #include <ubi_uboot.h>
 #include <spi.h>
 
-#include "xilinx_qspipss.h"
+#include "xilinx_qspips.h"
 
 #define DEBUG
 #define DEBUG_REG
@@ -65,7 +65,7 @@
 		u32 data;							\
 											\
 		do {								\
-			data = xqspipss_irq_poll(xqspi);\
+			data = xqspips_irq_poll(xqspi);\
 		} while (data == 0);	\
 	}
 
@@ -195,26 +195,26 @@ typedef enum irqreturn irqreturn_t;
  * Macros for the QSPI controller read/write
  */
 #ifdef LINUX_ONLY_NOT_UBOOT
-#define xqspipss_read(addr)		__raw_readl(addr)
-#define xqspipss_write(addr, val)	__raw_writel((val), (addr))
+#define xqspips_read(addr)		__raw_readl(addr)
+#define xqspips_write(addr, val)	__raw_writel((val), (addr))
 #else
 static inline
-u32 xqspipss_read(void *addr)		
+u32 xqspips_read(void *addr)
 {					
 	u32 val;
 
 	val =  XIo_In32((unsigned)addr);
 #ifdef DEBUG_REG
-	printf("xqspipss_read:  addr: 0x%08x = 0x%08x\n",
+	printf("xqspips_read:  addr: 0x%08x = 0x%08x\n",
 		addr, val);
 #endif
 	return val;
 }
 static inline
-void xqspipss_write(void *addr, u32 val)
+void xqspips_write(void *addr, u32 val)
 {
 #ifdef DEBUG_REG
-	printf("xqspipss_write: addr: 0x%08x = 0x%08x\n",
+	printf("xqspips_write: addr: 0x%08x = 0x%08x\n",
 		addr, val);
 #endif
 	XIo_Out32((unsigned)addr, val);
@@ -224,7 +224,7 @@ void xqspipss_write(void *addr, u32 val)
 #ifdef LINUX_ONLY_NOT_UBOOT
 
 /**
- * struct xqspipss - Defines qspi driver instance
+ * struct xqspips - Defines qspi driver instance
  * @workqueue:		Queue of all the transfers
  * @work:		Information about current transfer
  * @queue:		Head of the queue
@@ -245,7 +245,7 @@ void xqspipss_write(void *addr, u32 val)
  * @inst_response:	Responce to the instruction or data
  * @is_inst:		Flag to indicate the first message in a Transfer request
  **/
-struct xqspipss {
+struct xqspips {
 	struct workqueue_struct *workqueue;
 	struct work_struct work;
 	struct list_head queue;
@@ -263,7 +263,7 @@ struct xqspipss {
 	int bytes_to_receive;
 	u8 dev_busy;
 	struct completion done;
-	struct xqspipss_inst_format *curr_inst;
+	struct xqspips_inst_format *curr_inst;
 	u8 inst_response;
 	bool is_inst;
 };
@@ -271,12 +271,12 @@ struct xqspipss {
 #endif
 
 /**
- * struct xqspipss_inst_format - Defines qspi flash instruction format
+ * struct xqspips_inst_format - Defines qspi flash instruction format
  * @opcode:		Operational code of instruction
  * @inst_size:		Size of the instruction including address bytes
  * @offset:		Register address where instruction has to be written
  **/
-struct xqspipss_inst_format {
+struct xqspips_inst_format {
 	u8 opcode;
 	u8 inst_size;
 	u8 offset;
@@ -285,7 +285,7 @@ struct xqspipss_inst_format {
 /*
  * List of all the QSPI instructions and its format
  */
-static struct xqspipss_inst_format __devinitdata flash_inst[] = {
+static struct xqspips_inst_format __devinitdata flash_inst[] = {
 	{ XQSPIPSS_FLASH_OPCODE_WREN, 1, XQSPIPSS_TXD_00_01_OFFSET },
 	{ XQSPIPSS_FLASH_OPCODE_WRDS, 1, XQSPIPSS_TXD_00_01_OFFSET },
 	{ XQSPIPSS_FLASH_OPCODE_RDSR1, 1, XQSPIPSS_TXD_00_01_OFFSET },
@@ -307,7 +307,7 @@ static struct xqspipss_inst_format __devinitdata flash_inst[] = {
 };
 
 /**
- * xqspipss_init_hw - Initialize the hardware
+ * xqspips_init_hw - Initialize the hardware
  * @regs_base:		Base address of QSPI controller
  *
  * The default settings of the QSPI controller's configurable parameters on
@@ -326,43 +326,43 @@ static struct xqspipss_inst_format __devinitdata flash_inst[] = {
  *	- Set the little endian mode of TX FIFO and
  *	- Enable the QSPI controller
  **/
-void xqspipss_init_hw(void __iomem *regs_base)
+void xqspips_init_hw(void __iomem *regs_base)
 {
 	u32 config_reg;
 
-	xqspipss_write(regs_base + XQSPIPSS_ENABLE_OFFSET,
+	xqspips_write(regs_base + XQSPIPSS_ENABLE_OFFSET,
 		~XQSPIPSS_ENABLE_ENABLE_MASK);
-	xqspipss_write(regs_base + XQSPIPSS_IDIS_OFFSET, 0x7F);
+	xqspips_write(regs_base + XQSPIPSS_IDIS_OFFSET, 0x7F);
 
 	/* Disable linear mode as the boot loader may have used it */
-	xqspipss_write(regs_base + XQSPIPSS_LINEAR_CFG_OFFSET, 0);
+	xqspips_write(regs_base + XQSPIPSS_LINEAR_CFG_OFFSET, 0);
 
 	/* Clear the RX FIFO */
-	while (xqspipss_read(regs_base + XQSPIPSS_STATUS_OFFSET) &
+	while (xqspips_read(regs_base + XQSPIPSS_STATUS_OFFSET) &
 			XQSPIPSS_IXR_RXNEMTY_MASK)
-		xqspipss_read(regs_base + XQSPIPSS_RXD_OFFSET);
+		xqspips_read(regs_base + XQSPIPSS_RXD_OFFSET);
 
-	xqspipss_write(regs_base + XQSPIPSS_STATUS_OFFSET , 0x7F);
-	config_reg = xqspipss_read(regs_base + XQSPIPSS_CONFIG_OFFSET);
+	xqspips_write(regs_base + XQSPIPSS_STATUS_OFFSET , 0x7F);
+	config_reg = xqspips_read(regs_base + XQSPIPSS_CONFIG_OFFSET);
 	config_reg &= 0xFBFFFFFF; /* Set little endian mode of TX FIFO */
 	config_reg |= 0x8000FCC1;
-	xqspipss_write(regs_base + XQSPIPSS_CONFIG_OFFSET, config_reg);
+	xqspips_write(regs_base + XQSPIPSS_CONFIG_OFFSET, config_reg);
 
 #ifdef CONFIG_XILINX_PSS_QSPI_USE_DUAL_FLASH
-        xqspipss_write(regs_base + XQSPIPSS_LINEAR_CFG_OFFSET, 0x6400016B);
+	xqspips_write(regs_base + XQSPIPSS_LINEAR_CFG_OFFSET, 0x6400016B);
 #endif
 
-	xqspipss_write(regs_base + XQSPIPSS_ENABLE_OFFSET,
+	xqspips_write(regs_base + XQSPIPSS_ENABLE_OFFSET,
 			XQSPIPSS_ENABLE_ENABLE_MASK);
 }
 
 /**
- * xqspipss_copy_read_data - Copy data to RX buffer
- * @xqspi:	Pointer to the xqspipss structure
+ * xqspips_copy_read_data - Copy data to RX buffer
+ * @xqspi:	Pointer to the xqspips structure
  * @data:	The 32 bit variable where data is stored
  * @size:	Number of bytes to be copied from data to RX buffer
  **/
-static void xqspipss_copy_read_data(struct xqspipss *xqspi, u32 data, u8 size)
+static void xqspips_copy_read_data(struct xqspips *xqspi, u32 data, u8 size)
 {
 	u8 byte3;
 
@@ -409,12 +409,12 @@ static void xqspipss_copy_read_data(struct xqspipss *xqspi, u32 data, u8 size)
 }
 
 /**
- * xqspipss_copy_write_data - Copy data from TX buffer
- * @xqspi:	Pointer to the xqspipss structure
+ * xqspips_copy_write_data - Copy data from TX buffer
+ * @xqspi:	Pointer to the xqspips structure
  * @data:	Pointer to the 32 bit variable where data is to be copied
  * @size:	Number of bytes to be copied from TX buffer to data
  **/
-static void xqspipss_copy_write_data(struct xqspipss *xqspi, u32 *data, u8 size)
+static void xqspips_copy_write_data(struct xqspips *xqspi, u32 *data, u8 size)
 {
 
 	if (xqspi->txbuf) {
@@ -464,23 +464,23 @@ static void xqspipss_copy_write_data(struct xqspipss *xqspi, u32 *data, u8 size)
 }
 
 /**
- * xqspipss_chipselect - Select or deselect the chip select line
+ * xqspips_chipselect - Select or deselect the chip select line
  * @qspi:	Pointer to the spi_device structure
  * @is_on:	Select(1) or deselect (0) the chip select line
  **/
-static void xqspipss_chipselect(struct spi_device *qspi, int is_on)
+static void xqspips_chipselect(struct spi_device *qspi, int is_on)
 {
-	struct xqspipss *xqspi = spi_master_get_devdata(qspi->master);
+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
 	u32 config_reg;
 	unsigned long flags;
 
 #ifdef DEBUG
-	printf("xqspipss_chipselect: is_on: %d\n", is_on);
+	printf("xqspips_chipselect: is_on: %d\n", is_on);
 #endif
 
 	spin_lock_irqsave(&xqspi->config_reg_lock, flags);
 
-	config_reg = xqspipss_read(xqspi->regs + XQSPIPSS_CONFIG_OFFSET);
+	config_reg = xqspips_read(xqspi->regs + XQSPIPSS_CONFIG_OFFSET);
 
 	if (is_on) {
 		/* Select the slave */
@@ -491,13 +491,13 @@ static void xqspipss_chipselect(struct spi_device *qspi, int is_on)
 		/* Deselect the slave */
 		config_reg |= XQSPIPSS_CONFIG_SSCTRL_MASK;
 
-	xqspipss_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET, config_reg);
+	xqspips_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET, config_reg);
 
 	spin_unlock_irqrestore(&xqspi->config_reg_lock, flags);
 }
 
 /**
- * xqspipss_setup_transfer - Configure QSPI controller for specified transfer
+ * xqspips_setup_transfer - Configure QSPI controller for specified transfer
  * @qspi:	Pointer to the spi_device structure
  * @transfer:	Pointer to the spi_transfer structure which provides information
  *		about next transfer setup parameters
@@ -514,10 +514,10 @@ static void xqspipss_chipselect(struct spi_device *qspi, int is_on)
  * controller the driver will set the highest or lowest frequency supported by
  * controller.
  **/
-int xqspipss_setup_transfer(struct spi_device *qspi,
+int xqspips_setup_transfer(struct spi_device *qspi,
 		struct spi_transfer *transfer)
 {
-	struct xqspipss *xqspi = spi_master_get_devdata(qspi->master);
+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
 	u8 bits_per_word;
 	u32 config_reg;
 	u32 req_hz;
@@ -525,7 +525,7 @@ int xqspipss_setup_transfer(struct spi_device *qspi,
 	unsigned long flags;
 
 #ifdef DEBUG
-	printf("xqspipss_setup_transfer: qspi: 0x%08x transfer: 0x%08x\n",
+	printf("xqspips_setup_transfer: qspi: 0x%08x transfer: 0x%08x\n",
 		(u32)qspi, (u32)transfer);
 #endif
 	bits_per_word = (transfer) ?
@@ -544,7 +544,7 @@ int xqspipss_setup_transfer(struct spi_device *qspi,
 
 	spin_lock_irqsave(&xqspi->config_reg_lock, flags);
 
-	config_reg = xqspipss_read(xqspi->regs + XQSPIPSS_CONFIG_OFFSET);
+	config_reg = xqspips_read(xqspi->regs + XQSPIPSS_CONFIG_OFFSET);
 
 	/* Set the QSPI clock phase and clock polarity */
 	config_reg &= (~XQSPIPSS_CONFIG_CPHA_MASK) &
@@ -566,7 +566,7 @@ int xqspipss_setup_transfer(struct spi_device *qspi,
 		xqspi->speed_hz = req_hz;
 	}
 
-	xqspipss_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET, config_reg);
+	xqspips_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET, config_reg);
 
 	spin_unlock_irqrestore(&xqspi->config_reg_lock, flags);
 
@@ -580,7 +580,7 @@ int xqspipss_setup_transfer(struct spi_device *qspi,
 }
 
 /**
- * xqspipss_setup - Configure the QSPI controller
+ * xqspips_setup - Configure the QSPI controller
  * @qspi:	Pointer to the spi_device structure
  *
  * Sets the operational mode of QSPI controller for the next QSPI transfer, baud
@@ -588,7 +588,7 @@ int xqspipss_setup_transfer(struct spi_device *qspi,
  *
  * returns:	0 on success and error value on failure
  **/
-static int xqspipss_setup(struct spi_device *qspi)
+static int xqspips_setup(struct spi_device *qspi)
 {
 
 	if (qspi->mode & SPI_LSB_FIRST)
@@ -600,32 +600,32 @@ static int xqspipss_setup(struct spi_device *qspi)
 	if (!qspi->bits_per_word)
 		qspi->bits_per_word = 32;
 
-	return xqspipss_setup_transfer(qspi, NULL);
+	return xqspips_setup_transfer(qspi, NULL);
 }
 
 /**
- * xqspipss_fill_tx_fifo - Fills the TX FIFO with as many bytes as possible
- * @xqspi:	Pointer to the xqspipss structure
+ * xqspips_fill_tx_fifo - Fills the TX FIFO with as many bytes as possible
+ * @xqspi:	Pointer to the xqspips structure
  **/
-static void xqspipss_fill_tx_fifo(struct xqspipss *xqspi)
+static void xqspips_fill_tx_fifo(struct xqspips *xqspi)
 {
 	u32 data = 0;
 
-	while ((!(xqspipss_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET) &
+	while ((!(xqspips_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET) &
 		XQSPIPSS_IXR_TXFULL_MASK)) && (xqspi->bytes_to_transfer > 0)) {
 		if (xqspi->bytes_to_transfer < 4) {
-			xqspipss_copy_write_data(xqspi, &data,
+			xqspips_copy_write_data(xqspi, &data,
 				xqspi->bytes_to_transfer);
 		} else {
-			xqspipss_copy_write_data(xqspi, &data, 4);
+			xqspips_copy_write_data(xqspi, &data, 4);
 		}
 
-		xqspipss_write(xqspi->regs + XQSPIPSS_TXD_00_00_OFFSET, data);
+		xqspips_write(xqspi->regs + XQSPIPSS_TXD_00_00_OFFSET, data);
 	}
 }
 
 /**
- * xqspipss_irq - Interrupt service routine of the QSPI controller
+ * xqspips_irq - Interrupt service routine of the QSPI controller
  * @irq:	IRQ number
  * @dev_id:	Pointer to the xqspi structure
  *
@@ -639,40 +639,41 @@ static void xqspipss_fill_tx_fifo(struct xqspipss *xqspi)
  * returns:	IRQ_HANDLED always
  **/
 #ifdef LINUX_ONLY_NOT_UBOOT
-static irqreturn_t xqspipss_irq(int irq, void *dev_id)
+static irqreturn_t xqspips_irq(int irq, void *dev_id)
 {
-	struct xqspipss *xqspi = dev_id;
+	struct xqspips *xqspi = dev_id;
 #else
-static int xqspipss_irq_poll(struct xqspipss *xqspi)
+static int xqspips_irq_poll(struct xqspips *xqspi)
 {
 	int max_loop;
 #endif
 	u32 intr_status;
 
 #ifdef DEBUG
-	printf("xqspipss_irq_poll: xqspi: 0x%08x\n",
+	printf("xqspips_irq_poll: xqspi: 0x%08x\n",
 		(u32)xqspi);
 #endif
 
 #ifdef LINUX_ONLY_NOT_UBOOT
-	intr_status = xqspipss_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET);
+	intr_status = xqspips_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET);
 #else
 	/* u-boot: Poll until any of the interrupt status bits are set */
 	max_loop = 0;
 	do {
-		intr_status = xqspipss_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET);
+		intr_status = xqspips_read(xqspi->regs +
+				XQSPIPSS_STATUS_OFFSET);
 		max_loop ++;
 	} while ((intr_status == 0) && (max_loop < 100000));
 	if (intr_status == 0) {
-		printf("xqspipss_irq_poll: timeout\n");
+		printf("xqspips_irq_poll: timeout\n");
 		return 0;
 	}
 #endif
 
-	xqspipss_write(xqspi->regs + XQSPIPSS_STATUS_OFFSET , intr_status);
+	xqspips_write(xqspi->regs + XQSPIPSS_STATUS_OFFSET , intr_status);
 #ifndef LINUX_ONLY_NOT_UBOOT
 	/* u-boot: Disable all interrupts */
-	xqspipss_write(xqspi->regs + XQSPIPSS_IDIS_OFFSET,
+	xqspips_write(xqspi->regs + XQSPIPSS_IDIS_OFFSET,
 			XQSPIPSS_IXR_ALL_MASK);
 #endif
 
@@ -684,7 +685,7 @@ static int xqspipss_irq_poll(struct xqspipss *xqspi)
 		complete(&xqspi->done);
 #else
 		/* u-boot: return "operation complete" */
-		xqspipss_write(xqspi->regs + XQSPIPSS_IDIS_OFFSET,
+		xqspips_write(xqspi->regs + XQSPIPSS_IDIS_OFFSET,
 			XQSPIPSS_IXR_ALL_MASK);
 		return 1;
 #endif
@@ -696,11 +697,11 @@ static int xqspipss_irq_poll(struct xqspipss *xqspi)
 		u32 config_reg;
 
 		/* Read out the data from the RX FIFO */
-		while (xqspipss_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET) &
+		while (xqspips_read(xqspi->regs + XQSPIPSS_STATUS_OFFSET) &
 			XQSPIPSS_IXR_RXNEMTY_MASK) {
 			u32 data;
 
-			data = xqspipss_read(xqspi->regs + XQSPIPSS_RXD_OFFSET);
+			data = xqspips_read(xqspi->regs + XQSPIPSS_RXD_OFFSET);
 
 			if ((xqspi->inst_response) &&
 				(!((xqspi->curr_inst->opcode ==
@@ -708,28 +709,28 @@ static int xqspipss_irq_poll(struct xqspipss *xqspi)
 				(xqspi->curr_inst->opcode ==
 					XQSPIPSS_FLASH_OPCODE_RDSR2)))) {
 				xqspi->inst_response = 0;
-				xqspipss_copy_read_data(xqspi, data,
+				xqspips_copy_read_data(xqspi, data,
 					xqspi->curr_inst->inst_size);
 			} else if (xqspi->bytes_to_receive < 4)
-				xqspipss_copy_read_data(xqspi, data,
+				xqspips_copy_read_data(xqspi, data,
 					xqspi->bytes_to_receive);
 			else
-				xqspipss_copy_read_data(xqspi, data, 4);
+				xqspips_copy_read_data(xqspi, data, 4);
 		}
 
 		if (xqspi->bytes_to_transfer) {
 			/* There is more data to send */
-			xqspipss_fill_tx_fifo(xqspi);
+			xqspips_fill_tx_fifo(xqspi);
 
-			xqspipss_write(xqspi->regs + XQSPIPSS_IEN_OFFSET,
+			xqspips_write(xqspi->regs + XQSPIPSS_IEN_OFFSET,
 					XQSPIPSS_IXR_ALL_MASK);
 
 			spin_lock(&xqspi->config_reg_lock);
-			config_reg = xqspipss_read(xqspi->regs +
+			config_reg = xqspips_read(xqspi->regs +
 						XQSPIPSS_CONFIG_OFFSET);
 
 			config_reg |= XQSPIPSS_CONFIG_MANSRT_MASK;
-			xqspipss_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET,
+			xqspips_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET,
 				config_reg);
 			spin_unlock(&xqspi->config_reg_lock);
 		} else {
@@ -740,7 +741,8 @@ static int xqspipss_irq_poll(struct xqspipss *xqspi)
 				complete(&xqspi->done);
 #else
 				/* u-boot: return "operation complete" */
-				xqspipss_write(xqspi->regs + XQSPIPSS_IDIS_OFFSET,
+				xqspips_write(xqspi->regs +
+					XQSPIPSS_IDIS_OFFSET,
 					XQSPIPSS_IXR_ALL_MASK);
 				return 1;
 #endif
@@ -757,7 +759,7 @@ static int xqspipss_irq_poll(struct xqspipss *xqspi)
 }
 
 /**
- * xqspipss_start_transfer - Initiates the QSPI transfer
+ * xqspips_start_transfer - Initiates the QSPI transfer
  * @qspi:	Pointer to the spi_device structure
  * @transfer:	Pointer to the spi_transfer structure which provide information
  *		about next transfer parameters
@@ -767,10 +769,10 @@ static int xqspipss_irq_poll(struct xqspipss *xqspi)
  *
  * returns:	Number of bytes transferred in the last transfer
  **/
-static int xqspipss_start_transfer(struct spi_device *qspi,
+static int xqspips_start_transfer(struct spi_device *qspi,
 			struct spi_transfer *transfer)
 {
-	struct xqspipss *xqspi = spi_master_get_devdata(qspi->master);
+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
 	u32 config_reg;
 	unsigned long flags;
 	u32 data = 0;
@@ -781,8 +783,8 @@ static int xqspipss_start_transfer(struct spi_device *qspi,
 #endif
 
 #ifdef DEBUG
-	printf("xqspipss_start_transfer: qspi: 0x%08x transfer: 0x%08x len: %d\n",
-		(u32)qspi, (u32)transfer, transfer->len);
+	printf("%s: qspi: 0x%08x transfer: 0x%08x len: %d\n",
+		__func__, (u32)qspi, (u32)transfer, transfer->len);
 #endif
 
 	xqspi->txbuf = transfer->tx_buf;
@@ -844,7 +846,7 @@ static int xqspipss_start_transfer(struct spi_device *qspi,
 
 		/* Get the instruction */
 		data = 0;
-		xqspipss_copy_write_data(xqspi, &data,
+		xqspips_copy_write_data(xqspi, &data,
 			xqspi->curr_inst->inst_size);
 
 		/* Write the instruction to LSB of the FIFO. The core is
@@ -852,7 +854,7 @@ static int xqspipss_start_transfer(struct spi_device *qspi,
 		 * write FIFO is full before writing. However, write would be
 		 * delayed if the user tries to write when write FIFO is full
 		 */
-		xqspipss_write(xqspi->regs + xqspi->curr_inst->offset, data);
+		xqspips_write(xqspi->regs + xqspi->curr_inst->offset, data);
 
 #ifdef HACK_WRITE_NO_DELAY
 		if (xqspi->curr_inst->opcode == XQSPIPSS_FLASH_OPCODE_PP) {
@@ -890,14 +892,14 @@ xfer_data:
 	      (instruction != XQSPIPSS_FLASH_OPCODE_FAST_READ) &&
 	      (instruction != XQSPIPSS_FLASH_OPCODE_DUAL_READ) &&
 	      (instruction != XQSPIPSS_FLASH_OPCODE_QUAD_READ)))
-		xqspipss_fill_tx_fifo(xqspi);
-	xqspipss_write(xqspi->regs + XQSPIPSS_IEN_OFFSET,
+		xqspips_fill_tx_fifo(xqspi);
+	xqspips_write(xqspi->regs + XQSPIPSS_IEN_OFFSET,
 			XQSPIPSS_IXR_ALL_MASK);
 	/* Start the transfer by enabling manual start bit */
 	spin_lock_irqsave(&xqspi->config_reg_lock, flags);
-	config_reg = xqspipss_read(xqspi->regs +
+	config_reg = xqspips_read(xqspi->regs +
 			XQSPIPSS_CONFIG_OFFSET) | XQSPIPSS_CONFIG_MANSRT_MASK;
-	xqspipss_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET, config_reg);
+	xqspips_write(xqspi->regs + XQSPIPSS_CONFIG_OFFSET, config_reg);
 	spin_unlock_irqrestore(&xqspi->config_reg_lock, flags);
 
 	wait_for_completion(&xqspi->done);
@@ -907,19 +909,19 @@ xfer_data:
 
 #ifdef LINUX_ONLY_NOT_UBOOT
 /**
- * xqspipss_work_queue - Get the request from queue to perform transfers
+ * xqspips_work_queue - Get the request from queue to perform transfers
  * @work:	Pointer to the work_struct structure
  **/
-static void xqspipss_work_queue(struct work_struct *work)
+static void xqspips_work_queue(struct work_struct *work)
 #else
 int
-xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
+xqspips_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 #endif
 {
 #ifdef LINUX_ONLY_NOT_UBOOT
-	struct xqspipss *xqspi = container_of(work, struct xqspipss, work);
+	struct xqspips *xqspi = container_of(work, struct xqspips, work);
 #else
-	struct xqspipss *xqspi = spi_master_get_devdata(qspi->master);
+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
 #endif
 	unsigned long flags;
 
@@ -927,7 +929,7 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 	xqspi->dev_busy = 1;
 
 #ifdef DEBUG
-	printf("xqspipss_transfer: \n");
+	printf("xqspips_transfer\n");
 #endif
 
 #ifdef LINUX_ONLY_NOT_UBOOT
@@ -966,14 +968,14 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 #endif
 			if (transfer->bits_per_word || transfer->speed_hz) {
 				status =
-					xqspipss_setup_transfer(qspi, transfer);
+					xqspips_setup_transfer(qspi, transfer);
 				if (status < 0)
 					break;
 			}
 
 			/* Select the chip if required */
 			if (cs_change)
-				xqspipss_chipselect(qspi, 1);
+				xqspips_chipselect(qspi, 1);
 
 			cs_change = transfer->cs_change;
 
@@ -986,7 +988,7 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 			/* Request the transfer */
 			if (transfer->len) {
 				status =
-					xqspipss_start_transfer(qspi, transfer);
+					xqspips_start_transfer(qspi, transfer);
 				xqspi->is_inst = 0;
 			}
 
@@ -1005,7 +1007,7 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 
 			if (cs_change)
 				/* Deselect the chip */
-				xqspipss_chipselect(qspi, 0);
+				xqspips_chipselect(qspi, 0);
 
 #ifdef LINUX_ONLY_NOT_UBOOT
 			if (transfer->transfer_list.next == &msg->transfers)
@@ -1019,11 +1021,11 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 		}
 #endif
 
-		xqspipss_setup_transfer(qspi, NULL);
+		xqspips_setup_transfer(qspi, NULL);
 
 #ifdef LINUX_ONLY_NOT_UBOOT
 		if (!(status == 0 && cs_change))
-			xqspipss_chipselect(qspi, 0);
+			xqspips_chipselect(qspi, 0);
 #endif
 
 		spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
@@ -1039,7 +1041,7 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
 
 #ifdef LINUX_ONLY_NOT_UBOOT
 /**
- * xqspipss_transfer - Add a new transfer request at the tail of work queue
+ * xqspips_transfer - Add a new transfer request at the tail of work queue
  * @qspi:	Pointer to the spi_device structure
  * @message:	Pointer to the spi_transfer structure which provides information
  *		about next transfer parameters
@@ -1048,9 +1050,9 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_transfer *transfer)
  *		-ESHUTDOWN if queue is stopped by module unload function
  **/
 static int
-xqspipss_transfer(struct spi_device *qspi, struct spi_message *message)
+xqspips_transfer(struct spi_device *qspi, struct spi_message *message)
 {
-	struct xqspipss *xqspi = spi_master_get_devdata(qspi->master);
+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
 	struct spi_transfer *transfer;
 	unsigned long flags;
 
@@ -1085,13 +1087,13 @@ xqspipss_transfer(struct spi_device *qspi, struct spi_message *message)
 }
 
 /**
- * xqspipss_start_queue - Starts the queue of the QSPI driver
- * @xqspi:	Pointer to the xqspipss structure
+ * xqspips_start_queue - Starts the queue of the QSPI driver
+ * @xqspi:	Pointer to the xqspips structure
  *
  * returns:	0 on success and -EBUSY if queue is already running or device is
  *		busy
  **/
-static inline int xqspipss_start_queue(struct xqspipss *xqspi)
+static inline int xqspips_start_queue(struct xqspips *xqspi)
 {
 	unsigned long flags;
 
@@ -1109,15 +1111,15 @@ static inline int xqspipss_start_queue(struct xqspipss *xqspi)
 }
 
 /**
- * xqspipss_stop_queue - Stops the queue of the QSPI driver
- * @xqspi:	Pointer to the xqspipss structure
+ * xqspips_stop_queue - Stops the queue of the QSPI driver
+ * @xqspi:	Pointer to the xqspips structure
  *
  * This function waits till queue is empty and then stops the queue.
  * Maximum time out is set to 5 seconds.
  *
  * returns:	0 on success and -EBUSY if queue is not empty or device is busy
  **/
-static inline int xqspipss_stop_queue(struct xqspipss *xqspi)
+static inline int xqspips_stop_queue(struct xqspips *xqspi)
 {
 	unsigned long flags;
 	unsigned limit = 500;
@@ -1146,16 +1148,16 @@ static inline int xqspipss_stop_queue(struct xqspipss *xqspi)
 }
 
 /**
- * xqspipss_destroy_queue - Destroys the queue of the QSPI driver
- * @xqspi:	Pointer to the xqspipss structure
+ * xqspips_destroy_queue - Destroys the queue of the QSPI driver
+ * @xqspi:	Pointer to the xqspips structure
  *
  * returns:	0 on success and error value on failure
  **/
-static inline int xqspipss_destroy_queue(struct xqspipss *xqspi)
+static inline int xqspips_destroy_queue(struct xqspips *xqspi)
 {
 	int ret;
 
-	ret = xqspipss_stop_queue(xqspi);
+	ret = xqspips_stop_queue(xqspi);
 	if (ret != 0)
 		return ret;
 
@@ -1165,22 +1167,22 @@ static inline int xqspipss_destroy_queue(struct xqspipss *xqspi)
 }
 
 /**
- * xqspipss_probe - Probe method for the QSPI driver
+ * xqspips_probe - Probe method for the QSPI driver
  * @dev:	Pointer to the platform_device structure
  *
  * This function initializes the driver data structures and the hardware.
  *
  * returns:	0 on success and error value on failure
  **/
-static int __devinit xqspipss_probe(struct platform_device *dev)
+static int __devinit xqspips_probe(struct platform_device *dev)
 {
 	int ret = 0;
 	struct spi_master *master;
-	struct xqspipss *xqspi;
+	struct xqspips *xqspi;
 	struct resource *r;
 	struct xspi_platform_data *platform_info;
 
-	master = spi_alloc_master(&dev->dev, sizeof(struct xqspipss));
+	master = spi_alloc_master(&dev->dev, sizeof(struct xqspips));
 	if (master == NULL)
 		return -ENOMEM;
 
@@ -1222,7 +1224,7 @@ static int __devinit xqspipss_probe(struct platform_device *dev)
 		goto unmap_io;
 	}
 
-	ret = request_irq(xqspi->irq, xqspipss_irq, 0, dev->name, xqspi);
+	ret = request_irq(xqspi->irq, xqspips_irq, 0, dev->name, xqspi);
 	if (ret != 0) {
 		ret = -ENXIO;
 		dev_err(&dev->dev, "request_irq failed\n");
@@ -1230,13 +1232,13 @@ static int __devinit xqspipss_probe(struct platform_device *dev)
 	}
 
 	/* QSPI controller initializations */
-	xqspipss_init_hw(xqspi->regs);
+	xqspips_init_hw(xqspi->regs);
 
 	init_completion(&xqspi->done);
 	master->bus_num = platform_info->bus_num;
 	master->num_chipselect = platform_info->num_chipselect;
-	master->setup = xqspipss_setup;
-	master->transfer = xqspipss_transfer;
+	master->setup = xqspips_setup;
+	master->transfer = xqspips_transfer;
 	xqspi->input_clk_hz = platform_info->speed_hz;
 	xqspi->speed_hz = platform_info->speed_hz / 2;
 	xqspi->dev_busy = 0;
@@ -1248,7 +1250,7 @@ static int __devinit xqspipss_probe(struct platform_device *dev)
 	xqspi->queue_state = XQSPIPSS_QUEUE_STOPPED;
 	xqspi->dev_busy = 0;
 
-	INIT_WORK(&xqspi->work, xqspipss_work_queue);
+	INIT_WORK(&xqspi->work, xqspips_work_queue);
 	xqspi->workqueue =
 		create_singlethread_workqueue(dev_name(&master->dev));
 	if (!xqspi->workqueue) {
@@ -1257,7 +1259,7 @@ static int __devinit xqspipss_probe(struct platform_device *dev)
 		goto free_irq;
 	}
 
-	ret = xqspipss_start_queue(xqspi);
+	ret = xqspips_start_queue(xqspi);
 	if (ret != 0) {
 		dev_err(&dev->dev, "problem starting queue\n");
 		goto remove_queue;
@@ -1275,7 +1277,7 @@ static int __devinit xqspipss_probe(struct platform_device *dev)
 	return ret;
 
 remove_queue:
-	(void)xqspipss_destroy_queue(xqspi);
+	(void)xqspips_destroy_queue(xqspi);
 free_irq:
 	free_irq(xqspi->irq, xqspi);
 unmap_io:
@@ -1289,7 +1291,7 @@ put_master:
 }
 
 /**
- * xqspipss_remove - Remove method for the QSPI driver
+ * xqspips_remove - Remove method for the QSPI driver
  * @dev:	Pointer to the platform_device structure
  *
  * This function is called if a device is physically removed from the system or
@@ -1298,10 +1300,10 @@ put_master:
  *
  * returns:	0 on success and error value on failure
  **/
-static int __devexit xqspipss_remove(struct platform_device *dev)
+static int __devexit xqspips_remove(struct platform_device *dev)
 {
 	struct spi_master *master = platform_get_drvdata(dev);
-	struct xqspipss *xqspi = spi_master_get_devdata(master);
+	struct xqspips *xqspi = spi_master_get_devdata(master);
 	struct resource *r;
 	int ret = 0;
 
@@ -1311,11 +1313,11 @@ static int __devexit xqspipss_remove(struct platform_device *dev)
 		return -ENODEV;
 	}
 
-	ret = xqspipss_destroy_queue(xqspi);
+	ret = xqspips_destroy_queue(xqspi);
 	if (ret != 0)
 		return ret;
 
-	xqspipss_write(xqspi->regs + XQSPIPSS_ENABLE_OFFSET,
+	xqspips_write(xqspi->regs + XQSPIPSS_ENABLE_OFFSET,
 			~XQSPIPSS_ENABLE_ENABLE_MASK);
 
 	free_irq(xqspi->irq, xqspi);
@@ -1336,11 +1338,11 @@ static int __devexit xqspipss_remove(struct platform_device *dev)
 MODULE_ALIAS("platform:" DRIVER_NAME);
 
 /*
- * xqspipss_driver - This structure defines the QSPI platform driver
+ * xqspips_driver - This structure defines the QSPI platform driver
  */
-static struct platform_driver xqspipss_driver = {
-	.probe	= xqspipss_probe,
-	.remove	= __devexit_p(xqspipss_remove),
+static struct platform_driver xqspips_driver = {
+	.probe	= xqspips_probe,
+	.remove	= __devexit_p(xqspips_remove),
 	.suspend = NULL,
 	.resume = NULL,
 	.driver = {
@@ -1350,26 +1352,26 @@ static struct platform_driver xqspipss_driver = {
 };
 
 /**
- * xqspipss_init - QSPI driver module initialization function
+ * xqspips_init - QSPI driver module initialization function
  *
  * returns:	0 on success and error value on failure
  **/
-static int __init xqspipss_init(void)
+static int __init xqspips_init(void)
 {
-	return platform_driver_register(&xqspipss_driver);
+	return platform_driver_register(&xqspips_driver);
 }
 
-module_init(xqspipss_init);
+module_init(xqspips_init);
 
 /**
- * xqspipss_exit - QSPI driver module exit function
+ * xqspips_exit - QSPI driver module exit function
  **/
-static void __exit xqspipss_exit(void)
+static void __exit xqspips_exit(void)
 {
-	platform_driver_unregister(&xqspipss_driver);
+	platform_driver_unregister(&xqspips_driver);
 }
 
-module_exit(xqspipss_exit);
+module_exit(xqspips_exit);
 
 MODULE_AUTHOR("Xilinx, Inc.");
 MODULE_DESCRIPTION("Xilinx PSS QSPI driver");
diff --git a/board/xilinx/zynq_common/xilinx_qspipss.h b/board/xilinx/zynq_common/xilinx_qspips.h
similarity index 81%
rename from board/xilinx/zynq_common/xilinx_qspipss.h
rename to board/xilinx/zynq_common/xilinx_qspips.h
index cb077fc9cf6..45e805b07e5 100644
--- a/board/xilinx/zynq_common/xilinx_qspipss.h
+++ b/board/xilinx/zynq_common/xilinx_qspips.h
@@ -6,7 +6,7 @@
 typedef unsigned int bool;
 #endif
 
-struct xqspipss {
+struct xqspips {
         u8 queue_state;
         void *regs;
         u32 input_clk_hz;
@@ -20,13 +20,13 @@ struct xqspipss {
         u8 dev_busy;
         int done;
 
-        struct xqspipss_inst_format *curr_inst;
+	struct xqspips_inst_format *curr_inst;
         u8 inst_response;
         bool is_inst;
 };
 
 struct spi_device {
-        struct xqspipss master;
+	struct xqspips master;
         u32             max_speed_hz;
         u8              chip_select;
         u8              mode;
@@ -45,10 +45,10 @@ struct spi_transfer {
 };
 
 /**************************************************************************/
-extern void xqspipss_init_hw(void *regs_base);
-extern int  xqspipss_setup_transfer(struct spi_device   *qspi,
+extern void xqspips_init_hw(void *regs_base);
+extern int  xqspips_setup_transfer(struct spi_device   *qspi,
                                     struct spi_transfer *transfer);
-extern int  xqspipss_transfer(struct spi_device   *qspi,
+extern int  xqspips_transfer(struct spi_device   *qspi,
                               struct spi_transfer *transfer);
 
 /**************************************************************************/
diff --git a/board/xilinx/zynq_common/xparameters.h b/board/xilinx/zynq_common/xparameters.h
index 64aa3bf9429..889f4c93a04 100755
--- a/board/xilinx/zynq_common/xparameters.h
+++ b/board/xilinx/zynq_common/xparameters.h
@@ -1,7 +1,7 @@
 #ifndef _XPARAMETERS_H_
 #define _XPARAMETERS_H_
 
-#include "xparameters_pss.h"
+#include "xparameters_ps.h"
 
 #define STDIN_BASEADDRESS		XPAR_XUARTPSS_0_BASEADDR
 #define STDOUT_BASEADDRESS		XPAR_XUARTPSS_0_BASEADDR
diff --git a/board/xilinx/zynq_common/xparameters_pss_zynq.h b/board/xilinx/zynq_common/xparameters_ps.h
similarity index 99%
rename from board/xilinx/zynq_common/xparameters_pss_zynq.h
rename to board/xilinx/zynq_common/xparameters_ps.h
index 4b4968b7e8c..08e989388a5 100755
--- a/board/xilinx/zynq_common/xparameters_pss_zynq.h
+++ b/board/xilinx/zynq_common/xparameters_ps.h
@@ -1,4 +1,3 @@
-/* $Id: xparameters_pss.h,v 1.1.2.3 2009/07/01 21:42:22 meinelte Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009 Xilinx, Inc. All rights reserved.
@@ -40,7 +39,7 @@
 ******************************************************************************/
 /*****************************************************************************/
 /**
-* @file xparameters_pss.h
+* @file xparameters_ps.h
 *
 * This file contains the address definitions for the hard peripherals
 * attached to the Cortex A9 core.
diff --git a/board/xilinx/zynq_common/xparameters_pss.h b/board/xilinx/zynq_common/xparameters_ps_zynq.h
similarity index 99%
rename from board/xilinx/zynq_common/xparameters_pss.h
rename to board/xilinx/zynq_common/xparameters_ps_zynq.h
index 4b4968b7e8c..08e989388a5 100755
--- a/board/xilinx/zynq_common/xparameters_pss.h
+++ b/board/xilinx/zynq_common/xparameters_ps_zynq.h
@@ -1,4 +1,3 @@
-/* $Id: xparameters_pss.h,v 1.1.2.3 2009/07/01 21:42:22 meinelte Exp $ */
 /******************************************************************************
 *
 * (c) Copyright 2009 Xilinx, Inc. All rights reserved.
@@ -40,7 +39,7 @@
 ******************************************************************************/
 /*****************************************************************************/
 /**
-* @file xparameters_pss.h
+* @file xparameters_ps.h
 *
 * This file contains the address definitions for the hard peripherals
 * attached to the Cortex A9 core.
diff --git a/board/xilinx/zynq_common/xparameters_zynq.h b/board/xilinx/zynq_common/xparameters_zynq.h
index e9f61908648..21dd86b2853 100755
--- a/board/xilinx/zynq_common/xparameters_zynq.h
+++ b/board/xilinx/zynq_common/xparameters_zynq.h
@@ -1,7 +1,7 @@
 #ifndef _XPARAMETERS_H_
 #define _XPARAMETERS_H_
 
-#include "xparameters_pss_zynq.h"
+#include "xparameters_ps_zynq.h"
 
 #define STDIN_BASEADDRESS		XPAR_XUARTPSS_0_BASEADDR
 #define STDOUT_BASEADDRESS		XPAR_XUARTPSS_0_BASEADDR
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index d974a11df0e..3899650480a 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -65,7 +65,7 @@ COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
 COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
 COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o
 COBJS-$(CONFIG_RTC_X1205) += x1205.o
-COBJS-$(CONFIG_RTC_XPSSRTC) += xpssrtc.o
+COBJS-$(CONFIG_RTC_XPSSRTC) += xpsrtc.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/rtc/xpssrtc.c b/drivers/rtc/xpsrtc.c
similarity index 100%
rename from drivers/rtc/xpssrtc.c
rename to drivers/rtc/xpsrtc.c
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 082f8aa2add..2935a1771ab 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -57,7 +57,7 @@ COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
 COBJS-$(CONFIG_TEGRA2) += serial_tegra2.o
 COBJS-$(CONFIG_USB_TTY) += usbtty.o
-COBJS-$(CONFIG_PSS_SERIAL) += serial_xpssuart.o
+COBJS-$(CONFIG_PSS_SERIAL) += serial_xpsuart.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/serial/serial_xpssuart.c b/drivers/serial/serial_xpsuart.c
similarity index 98%
rename from drivers/serial/serial_xpssuart.c
rename to drivers/serial/serial_xpsuart.c
index 7c30a472da6..51c94beb48c 100644
--- a/drivers/serial/serial_xpssuart.c
+++ b/drivers/serial/serial_xpsuart.c
@@ -5,7 +5,7 @@
 
 #include <common.h>
 
-#include "serial_xpssuart.h"
+#include "serial_xpsuart.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/serial/serial_xpssuart.h b/drivers/serial/serial_xpsuart.h
similarity index 100%
rename from drivers/serial/serial_xpssuart.h
rename to drivers/serial/serial_xpsuart.h
-- 
2.47.3