From c526d9e50d325479fff2ffe534fe9aff2247b1ef Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Mon, 24 Jun 2024 09:48:18 -0400 Subject: [PATCH] Fixes for 6.9 Signed-off-by: Sasha Levin --- ...-camera-graph-port-nodes-on-all-dell.patch | 98 ++++++ ...pica-avoid-info-mapping-multiple-bar.patch | 84 +++++ ...b-hdmi-disable-panel-instead-of-dele.patch | 64 ++++ ...ale-imx8mm-verdin-enable-hysteresis-.patch | 40 +++ ...reescale-imx8mm-verdin-fix-gpu-speed.patch | 38 +++ ...ale-imx8mp-venice-gw73xx-2x-fix-bt-s.patch | 35 +++ ...-fix-tc9595-input-clock-on-dh-i.mx8m.patch | 42 +++ ...11x11-evk-remove-the-no-sdio-propert.patch | 40 +++ ...-fsl-edma-avoid-linking-both-modules.patch | 52 ++++ ...ix-possible-use-after-free-in-irq_pr.patch | 48 +++ ...ma-fix-error-path-in-ioat3_dma_probe.patch | 94 ++++++ ...atdma-fix-kmemleak-in-ioat_pci_probe.patch | 66 ++++ ...tdma-fix-leaking-on-version-mismatch.patch | 69 +++++ ...atdma-fix-missing-kmem_cache_destroy.patch | 46 +++ ...udma-glue-fix-of_k3_udma_glue_parse_.patch | 45 +++ ...touch-guc-irq-registers-if-using-mem.patch | 54 ++++ ...x-return-value-from-psci_system_susp.patch | 49 +++ ...x-incorrect-assignment-of-iter-nr_se.patch | 39 +++ ...ing-all-memslots-when-null-mmu_notif.patch | 88 ++++++ ...llow-objtool-orc-unwinder-if-toolcha.patch | 78 +++++ ...en-reading-pool_stats-before-server-.patch | 57 ++++ ...bo-switch-from-v6-to-v6-n4-register-.patch | 292 ++++++++++++++++++ ...s-add-missing-v6-n4-register-offsets.patch | 69 +++++ ...rdes-txrx-add-missing-registers-offs.patch | 58 ++++ ...o-add-generated-p8-asm-to-.gitignore.patch | 36 +++ ...xt_re-fix-the-max-msix-vectors-macro.patch | 49 +++ ...ignore-optional-access-flags-for-mrs.patch | 35 +++ ...-add-check-for-srq-max_sge-attribute.patch | 55 ++++ ...wind-flow-as-part-of-mlx5_ib_stage_i.patch | 42 +++ ...ponder-length-checking-for-ud-reques.patch | 60 ++++ .../regulator-bd71815-fix-ramp-values.patch | 40 +++ ...ix-modpost-error-regulator_get_regma.patch | 38 +++ queue-6.9/series | 37 +++ ...cs42l43-correct-spi-root-clock-speed.patch | 39 +++ .../spi-fix-spi-slave-probe-failure.patch | 50 +++ ...1-revert-burst-length-calculation-ba.patch | 95 ++++++ ...mediatek-lvts_thermal-return-error-i.patch | 45 +++ ...-don-t-try-to-free-nonexistent-rmids.patch | 72 +++++ 38 files changed, 2338 insertions(+) create mode 100644 queue-6.9/acpi-scan-ignore-camera-graph-port-nodes-on-all-dell.patch create mode 100644 queue-6.9/acpica-revert-acpica-avoid-info-mapping-multiple-bar.patch create mode 100644 queue-6.9/arm-dts-imx53-qsb-hdmi-disable-panel-instead-of-dele.patch create mode 100644 queue-6.9/arm64-dts-freescale-imx8mm-verdin-enable-hysteresis-.patch create mode 100644 queue-6.9/arm64-dts-freescale-imx8mm-verdin-fix-gpu-speed.patch create mode 100644 queue-6.9/arm64-dts-freescale-imx8mp-venice-gw73xx-2x-fix-bt-s.patch create mode 100644 queue-6.9/arm64-dts-imx8mp-fix-tc9595-input-clock-on-dh-i.mx8m.patch create mode 100644 queue-6.9/arm64-dts-imx93-11x11-evk-remove-the-no-sdio-propert.patch create mode 100644 queue-6.9/dmaengine-fsl-edma-avoid-linking-both-modules.patch create mode 100644 queue-6.9/dmaengine-idxd-fix-possible-use-after-free-in-irq_pr.patch create mode 100644 queue-6.9/dmaengine-ioatdma-fix-error-path-in-ioat3_dma_probe.patch create mode 100644 queue-6.9/dmaengine-ioatdma-fix-kmemleak-in-ioat_pci_probe.patch create mode 100644 queue-6.9/dmaengine-ioatdma-fix-leaking-on-version-mismatch.patch create mode 100644 queue-6.9/dmaengine-ioatdma-fix-missing-kmem_cache_destroy.patch create mode 100644 queue-6.9/dmaengine-ti-k3-udma-glue-fix-of_k3_udma_glue_parse_.patch create mode 100644 queue-6.9/drm-xe-vf-don-t-touch-guc-irq-registers-if-using-mem.patch create mode 100644 queue-6.9/firmware-psci-fix-return-value-from-psci_system_susp.patch create mode 100644 queue-6.9/io_uring-rsrc-fix-incorrect-assignment-of-iter-nr_se.patch create mode 100644 queue-6.9/kvm-stop-processing-all-memslots-when-null-mmu_notif.patch create mode 100644 queue-6.9/loongarch-only-allow-objtool-orc-unwinder-if-toolcha.patch create mode 100644 queue-6.9/nfsd-fix-oops-when-reading-pool_stats-before-server-.patch create mode 100644 queue-6.9/phy-qcom-qmp-combo-switch-from-v6-to-v6-n4-register-.patch create mode 100644 queue-6.9/phy-qcom-qmp-pcs-add-missing-v6-n4-register-offsets.patch create mode 100644 queue-6.9/phy-qcom-qmp-qserdes-txrx-add-missing-registers-offs.patch create mode 100644 queue-6.9/powerpc-crypto-add-generated-p8-asm-to-.gitignore.patch create mode 100644 queue-6.9/rdma-bnxt_re-fix-the-max-msix-vectors-macro.patch create mode 100644 queue-6.9/rdma-mana_ib-ignore-optional-access-flags-for-mrs.patch create mode 100644 queue-6.9/rdma-mlx5-add-check-for-srq-max_sge-attribute.patch create mode 100644 queue-6.9/rdma-mlx5-fix-unwind-flow-as-part-of-mlx5_ib_stage_i.patch create mode 100644 queue-6.9/rdma-rxe-fix-responder-length-checking-for-ud-reques.patch create mode 100644 queue-6.9/regulator-bd71815-fix-ramp-values.patch create mode 100644 queue-6.9/regulator-core-fix-modpost-error-regulator_get_regma.patch create mode 100644 queue-6.9/spi-cs42l43-correct-spi-root-clock-speed.patch create mode 100644 queue-6.9/spi-fix-spi-slave-probe-failure.patch create mode 100644 queue-6.9/spi-spi-imx-imx51-revert-burst-length-calculation-ba.patch create mode 100644 queue-6.9/thermal-drivers-mediatek-lvts_thermal-return-error-i.patch create mode 100644 queue-6.9/x86-resctrl-don-t-try-to-free-nonexistent-rmids.patch diff --git a/queue-6.9/acpi-scan-ignore-camera-graph-port-nodes-on-all-dell.patch b/queue-6.9/acpi-scan-ignore-camera-graph-port-nodes-on-all-dell.patch new file mode 100644 index 00000000000..2430adc168b --- /dev/null +++ b/queue-6.9/acpi-scan-ignore-camera-graph-port-nodes-on-all-dell.patch @@ -0,0 +1,98 @@ +From 4c336f7160cca94a85f0e91950db5020a5230e9d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 12:42:20 +0200 +Subject: ACPI: scan: Ignore camera graph port nodes on all Dell Tiger, Alder + and Raptor Lake models + +From: Hans de Goede + +[ Upstream commit c7be64355fccfe7d4727681e32fce07113e40af1 ] + +Dell laptops with IPU6 camera (the Tiger Lake, Alder Lake and Raptor +Lake generations) have broken ACPI MIPI DISCO information (this results +from an OEM attempt to make Linux work by supplying it with custom data +in the ACPI tables which has never been supported in the mainline). + +Instead of adding a lot of DMI quirks for this, check for Dell platforms +based on the processor generations in question and drop the ACPI graph +port nodes, likely to be created with the help of invalid data, on all +of them. + +Fixes: bd721b934323 ("ACPI: scan: Extract CSI-2 connection graph from _CRS") +Signed-off-by: Hans de Goede +[ rjw: Changelog edits ] +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + drivers/acpi/internal.h | 4 ++++ + drivers/acpi/mipi-disco-img.c | 28 +++++++++++++++++++--------- + 2 files changed, 23 insertions(+), 9 deletions(-) + +diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h +index a0801e0876fc0..a96d1bc662a37 100644 +--- a/drivers/acpi/internal.h ++++ b/drivers/acpi/internal.h +@@ -301,6 +301,10 @@ void acpi_mipi_check_crs_csi2(acpi_handle handle); + void acpi_mipi_scan_crs_csi2(void); + void acpi_mipi_init_crs_csi2_swnodes(void); + void acpi_mipi_crs_csi2_cleanup(void); ++#ifdef CONFIG_X86 + bool acpi_graph_ignore_port(acpi_handle handle); ++#else ++static inline bool acpi_graph_ignore_port(acpi_handle handle) { return false; } ++#endif + + #endif /* _ACPI_INTERNAL_H_ */ +diff --git a/drivers/acpi/mipi-disco-img.c b/drivers/acpi/mipi-disco-img.c +index d05413a0672a9..0ab13751f0dbc 100644 +--- a/drivers/acpi/mipi-disco-img.c ++++ b/drivers/acpi/mipi-disco-img.c +@@ -725,14 +725,20 @@ void acpi_mipi_crs_csi2_cleanup(void) + acpi_mipi_del_crs_csi2(csi2); + } + +-static const struct dmi_system_id dmi_ignore_port_nodes[] = { +- { +- .matches = { +- DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."), +- DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "XPS 9315"), +- }, +- }, +- { } ++#ifdef CONFIG_X86 ++#include ++#include ++ ++/* CPU matches for Dell generations with broken ACPI MIPI DISCO info */ ++static const struct x86_cpu_id dell_broken_mipi_disco_cpu_gens[] = { ++ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL), ++ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL), ++ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL), ++ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL), ++ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL), ++ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL), ++ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL), ++ {} + }; + + static const char *strnext(const char *s1, const char *s2) +@@ -761,7 +767,10 @@ bool acpi_graph_ignore_port(acpi_handle handle) + static bool dmi_tested, ignore_port; + + if (!dmi_tested) { +- ignore_port = dmi_first_match(dmi_ignore_port_nodes); ++ if (dmi_name_in_vendors("Dell Inc.") && ++ x86_match_cpu(dell_broken_mipi_disco_cpu_gens)) ++ ignore_port = true; ++ + dmi_tested = true; + } + +@@ -794,3 +803,4 @@ bool acpi_graph_ignore_port(acpi_handle handle) + kfree(orig_path); + return false; + } ++#endif +-- +2.43.0 + diff --git a/queue-6.9/acpica-revert-acpica-avoid-info-mapping-multiple-bar.patch b/queue-6.9/acpica-revert-acpica-avoid-info-mapping-multiple-bar.patch new file mode 100644 index 00000000000..e9f8e7adc33 --- /dev/null +++ b/queue-6.9/acpica-revert-acpica-avoid-info-mapping-multiple-bar.patch @@ -0,0 +1,84 @@ +From 1897b411b1e3d523da42e2c5e5519b5fcaf6e085 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Jun 2024 19:31:49 +0530 +Subject: ACPICA: Revert "ACPICA: avoid Info: mapping multiple BARs. Your + kernel is fine." + +From: Raju Rangoju + +[ Upstream commit a83e1385b780d41307433ddbc86e3c528db031f0 ] + +Undo the modifications made in commit d410ee5109a1 ("ACPICA: avoid +"Info: mapping multiple BARs. Your kernel is fine.""). The initial +purpose of this commit was to stop memory mappings for operation +regions from overlapping page boundaries, as it can trigger warnings +if different page attributes are present. + +However, it was found that when this situation arises, mapping +continues until the boundary's end, but there is still an attempt to +read/write the entire length of the map, leading to a NULL pointer +deference. For example, if a four-byte mapping request is made but +only one byte is mapped because it hits the current page boundary's +end, a four-byte read/write attempt is still made, resulting in a NULL +pointer deference. + +Instead, map the entire length, as the ACPI specification does not +mandate that it must be within the same page boundary. It is +permissible for it to be mapped across different regions. + +Link: https://github.com/acpica/acpica/pull/954 +Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218849 +Fixes: d410ee5109a1 ("ACPICA: avoid "Info: mapping multiple BARs. Your kernel is fine."") +Co-developed-by: Sanath S +Signed-off-by: Sanath S +Signed-off-by: Raju Rangoju +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +--- + drivers/acpi/acpica/exregion.c | 23 ++--------------------- + 1 file changed, 2 insertions(+), 21 deletions(-) + +diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c +index 8907b8bf42672..c49b9f8de723d 100644 +--- a/drivers/acpi/acpica/exregion.c ++++ b/drivers/acpi/acpica/exregion.c +@@ -44,7 +44,6 @@ acpi_ex_system_memory_space_handler(u32 function, + struct acpi_mem_mapping *mm = mem_info->cur_mm; + u32 length; + acpi_size map_length; +- acpi_size page_boundary_map_length; + #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED + u32 remainder; + #endif +@@ -138,26 +137,8 @@ acpi_ex_system_memory_space_handler(u32 function, + map_length = (acpi_size) + ((mem_info->address + mem_info->length) - address); + +- /* +- * If mapping the entire remaining portion of the region will cross +- * a page boundary, just map up to the page boundary, do not cross. +- * On some systems, crossing a page boundary while mapping regions +- * can cause warnings if the pages have different attributes +- * due to resource management. +- * +- * This has the added benefit of constraining a single mapping to +- * one page, which is similar to the original code that used a 4k +- * maximum window. +- */ +- page_boundary_map_length = (acpi_size) +- (ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address); +- if (page_boundary_map_length == 0) { +- page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; +- } +- +- if (map_length > page_boundary_map_length) { +- map_length = page_boundary_map_length; +- } ++ if (map_length > ACPI_DEFAULT_PAGE_SIZE) ++ map_length = ACPI_DEFAULT_PAGE_SIZE; + + /* Create a new mapping starting at the address given */ + +-- +2.43.0 + diff --git a/queue-6.9/arm-dts-imx53-qsb-hdmi-disable-panel-instead-of-dele.patch b/queue-6.9/arm-dts-imx53-qsb-hdmi-disable-panel-instead-of-dele.patch new file mode 100644 index 00000000000..9e984dfd5ae --- /dev/null +++ b/queue-6.9/arm-dts-imx53-qsb-hdmi-disable-panel-instead-of-dele.patch @@ -0,0 +1,64 @@ +From f1cdfc86ba5440b169f0228fa4ea2fd45efe56e5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 11:07:18 +0800 +Subject: arm: dts: imx53-qsb-hdmi: Disable panel instead of deleting node + +From: Liu Ying + +[ Upstream commit bcdea3e81ea51c9e89e3b11aac2612e1b4330bee ] + +We cannot use /delete-node/ directive to delete a node in a DT +overlay. The node won't be deleted effectively. Instead, set +the node's status property to "disabled" to achieve something +similar. + +Fixes: eeb403df953f ("ARM: dts: imx53-qsb: add support for the HDMI expander") +Signed-off-by: Liu Ying +Reviewed-by: Dmitry Baryshkov +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi | 2 +- + arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso | 6 ++++-- + 2 files changed, 5 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi +index d804404464737..05d7a462ea25a 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi +@@ -85,7 +85,7 @@ + }; + }; + +- panel { ++ panel_dpi: panel { + compatible = "sii,43wvf1g"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_display_power>; +diff --git a/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso b/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso +index c84e9b0525276..151e9cee3c87e 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso ++++ b/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso +@@ -10,8 +10,6 @@ + /plugin/; + + &{/} { +- /delete-node/ panel; +- + hdmi: connector-hdmi { + compatible = "hdmi-connector"; + label = "hdmi"; +@@ -82,6 +80,10 @@ + }; + }; + ++&panel_dpi { ++ status = "disabled"; ++}; ++ + &tve { + status = "disabled"; + }; +-- +2.43.0 + diff --git a/queue-6.9/arm64-dts-freescale-imx8mm-verdin-enable-hysteresis-.patch b/queue-6.9/arm64-dts-freescale-imx8mm-verdin-enable-hysteresis-.patch new file mode 100644 index 00000000000..52aa15c3cce --- /dev/null +++ b/queue-6.9/arm64-dts-freescale-imx8mm-verdin-enable-hysteresis-.patch @@ -0,0 +1,40 @@ +From 236ed6666fc67d663412b1bca2dbda4a9e48656c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 16:00:45 +0200 +Subject: arm64: dts: freescale: imx8mm-verdin: enable hysteresis on slow input + pin + +From: Max Krummenacher + +[ Upstream commit 67cc6125fb39902169707cb6277f010e56d4a40a ] + +SODIMM 17 can be used as an edge triggered interrupt supplied from an +off board source. + +Enable hysteresis on the pinmuxing to increase immunity against noise +on the signal. + +Fixes: 60f01b5b5c7d ("arm64: dts: imx8mm-verdin: update iomux configuration") +Signed-off-by: Max Krummenacher +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +index 64e2f83f26498..1b1880c607cfe 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +@@ -930,7 +930,7 @@ + /* Verdin GPIO_9_DSI (pulled-up as active-low) */ + pinctrl_gpio_9_dsi: gpio9dsigrp { + fsl,pins = +- ; /* SODIMM 17 */ ++ ; /* SODIMM 17 */ + }; + + /* Verdin GPIO_10_DSI (pulled-up as active-low) */ +-- +2.43.0 + diff --git a/queue-6.9/arm64-dts-freescale-imx8mm-verdin-fix-gpu-speed.patch b/queue-6.9/arm64-dts-freescale-imx8mm-verdin-fix-gpu-speed.patch new file mode 100644 index 00000000000..af7b7b5a999 --- /dev/null +++ b/queue-6.9/arm64-dts-freescale-imx8mm-verdin-fix-gpu-speed.patch @@ -0,0 +1,38 @@ +From 59756f32ecde38214cb77b38498db3deb5dcd14f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 7 May 2024 11:35:55 -0300 +Subject: arm64: dts: freescale: imx8mm-verdin: Fix GPU speed + +From: Joao Paulo Goncalves + +[ Upstream commit 08f0fa5d6aa9488f752eb5410e32636f143b3d8e ] + +The GPU clock was reduced on iMX8MM SOC device tree to prevent boards +that don't support GPU overdrive from being out of specification. However, +this caused a regression in GPU speed for the Verdin iMX8MM, which does +support GPU overdrive. This patch fixes this by enabling overdrive mode +in the SOM dtsi. + +Fixes: 1f794d3eed53 ("arm64: dts: imx8mm: Reduce GPU to nominal speed") +Signed-off-by: Joao Paulo Goncalves +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +index 6f0811587142d..64e2f83f26498 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +@@ -6,6 +6,7 @@ + #include + #include + #include "imx8mm.dtsi" ++#include "imx8mm-overdrive.dtsi" + + / { + chosen { +-- +2.43.0 + diff --git a/queue-6.9/arm64-dts-freescale-imx8mp-venice-gw73xx-2x-fix-bt-s.patch b/queue-6.9/arm64-dts-freescale-imx8mp-venice-gw73xx-2x-fix-bt-s.patch new file mode 100644 index 00000000000..dfd50478371 --- /dev/null +++ b/queue-6.9/arm64-dts-freescale-imx8mp-venice-gw73xx-2x-fix-bt-s.patch @@ -0,0 +1,35 @@ +From 963a5e3b0571dbed35010691150e616941351256 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 22 May 2024 14:38:28 -0700 +Subject: arm64: dts: freescale: imx8mp-venice-gw73xx-2x: fix BT shutdown GPIO + +From: Tim Harvey + +[ Upstream commit e1b4622efbe7ad09c9a902365a993f68c270c453 ] + +Fix the invalid BT shutdown GPIO (gpio1_io3 not gpio4_io16) + +Fixes: 716ced308234 ("arm64: dts: freescale: Add imx8mp-venice-gw73xx-2x") +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +index f5491a608b2f3..3c063f8a9383e 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +@@ -183,7 +183,7 @@ + + bluetooth { + compatible = "brcm,bcm4330-bt"; +- shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; ++ shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.9/arm64-dts-imx8mp-fix-tc9595-input-clock-on-dh-i.mx8m.patch b/queue-6.9/arm64-dts-imx8mp-fix-tc9595-input-clock-on-dh-i.mx8m.patch new file mode 100644 index 00000000000..2ddd025b1a2 --- /dev/null +++ b/queue-6.9/arm64-dts-imx8mp-fix-tc9595-input-clock-on-dh-i.mx8m.patch @@ -0,0 +1,42 @@ +From 6035bdd3e472fbeaaccc24786fc95eaf12e88ecc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 15 Jun 2024 16:00:43 +0800 +Subject: arm64: dts: imx8mp: Fix TC9595 input clock on DH i.MX8M Plus DHCOM + SoM + +From: Marek Vasut + +[ Upstream commit c03984d43a9dd9282da54ccf275419f666029452 ] + +The IMX8MP_CLK_CLKOUT2 supplies the TC9595 bridge with 13 MHz reference +clock. The IMX8MP_CLK_CLKOUT2 is supplied from IMX8MP_AUDIO_PLL2_OUT. +The IMX8MP_CLK_CLKOUT2 operates only as a power-of-two divider, and the +current 156 MHz is not power-of-two divisible to achieve 13 MHz. + +To achieve 13 MHz output from IMX8MP_CLK_CLKOUT2, set IMX8MP_AUDIO_PLL2_OUT +to 208 MHz, because 208 MHz / 16 = 13 MHz. + +Fixes: 20d0b83e712b ("arm64: dts: imx8mp: Add TC9595 bridge on DH electronics i.MX8M Plus DHCOM") +Signed-off-by: Marek Vasut +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +index 43f1d45ccc96f..f5115f9e8c473 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +@@ -254,7 +254,7 @@ + <&clk IMX8MP_CLK_CLKOUT2>, + <&clk IMX8MP_AUDIO_PLL2_OUT>; + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; +- assigned-clock-rates = <13000000>, <13000000>, <156000000>; ++ assigned-clock-rates = <13000000>, <13000000>, <208000000>; + reset-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; + status = "disabled"; + +-- +2.43.0 + diff --git a/queue-6.9/arm64-dts-imx93-11x11-evk-remove-the-no-sdio-propert.patch b/queue-6.9/arm64-dts-imx93-11x11-evk-remove-the-no-sdio-propert.patch new file mode 100644 index 00000000000..d4506945fc5 --- /dev/null +++ b/queue-6.9/arm64-dts-imx93-11x11-evk-remove-the-no-sdio-propert.patch @@ -0,0 +1,40 @@ +From 56da0a6ea501cb3cff7a5d140498566a773a9286 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 May 2024 00:48:54 -0300 +Subject: arm64: dts: imx93-11x11-evk: Remove the 'no-sdio' property + +From: Fabio Estevam + +[ Upstream commit a5d400b6439ac734a5c0dbb641e26a38736abc17 ] + +The usdhc2 port is connected to the microSD slot. The presence of the +'no-sdio' property prevents Wifi SDIO cards, such as CMP9010-X-EVB [1] +to be detected. + +Remove the 'no-sdio' property so that SDIO cards could also work. + +[1] https://www.nxp.com/products/wireless-connectivity/wi-fi-plus-bluetooth-plus-802-15-4/cmp9010-x-evb-iw416-usd-interface-evaluation-board:CMP9010-X-EVB + +Fixes: e37907bd8294 ("arm64: dts: freescale: add i.MX93 11x11 EVK basic support") +Signed-off-by: Fabio Estevam +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +index 9921ea13ab489..a7cb571d74023 100644 +--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts ++++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +@@ -175,7 +175,6 @@ + vmmc-supply = <®_usdhc2_vmmc>; + bus-width = <4>; + status = "okay"; +- no-sdio; + no-mmc; + }; + +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-fsl-edma-avoid-linking-both-modules.patch b/queue-6.9/dmaengine-fsl-edma-avoid-linking-both-modules.patch new file mode 100644 index 00000000000..3b6949bcfd0 --- /dev/null +++ b/queue-6.9/dmaengine-fsl-edma-avoid-linking-both-modules.patch @@ -0,0 +1,52 @@ +From 0ff0a64796c1e54fc572df7d98401bf85396db3f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 13:54:22 +0200 +Subject: dmaengine: fsl-edma: avoid linking both modules + +From: Arnd Bergmann + +[ Upstream commit fa555b5026d0bf1ba7c9e645ff75e2725a982631 ] + +Kbuild does not support having a source file compiled multiple times +and linked into distinct modules, or built-in and modular at the +same time. For fs-edma, there are two common components that are +linked into the fsl-edma.ko for Arm and PowerPC, plus the mcf-edma.ko +module on Coldfire. This violates the rule for compile-testing: + +scripts/Makefile.build:236: drivers/dma/Makefile: fsl-edma-common.o is added to multiple modules: fsl-edma mcf-edma +scripts/Makefile.build:236: drivers/dma/Makefile: fsl-edma-trace.o is added to multiple modules: fsl-edma mcf-edma + +I tried splitting out the common parts into a separate modules, but +that adds back the complexity that a cleanup patch removed, and it +gets harder with the addition of the tracepoints. + +As a minimal workaround, address it at the Kconfig level, by disallowing +the broken configurations. + +Link: https://lore.kernel.org/lkml/20240110232255.1099757-1-arnd@kernel.org/ +Fixes: 66aac8ea0a6c ("dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c") +Signed-off-by: Arnd Bergmann +Acked-by: Peng Fan +Link: https://lore.kernel.org/r/20240528115440.2965975-1-arnd@kernel.org +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig +index 002a5ec806207..9fc99cfbef08c 100644 +--- a/drivers/dma/Kconfig ++++ b/drivers/dma/Kconfig +@@ -394,7 +394,7 @@ config LS2X_APB_DMA + + config MCF_EDMA + tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" +- depends on M5441x || COMPILE_TEST ++ depends on M5441x || (COMPILE_TEST && FSL_EDMA=n) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + help +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-idxd-fix-possible-use-after-free-in-irq_pr.patch b/queue-6.9/dmaengine-idxd-fix-possible-use-after-free-in-irq_pr.patch new file mode 100644 index 00000000000..39644f3d733 --- /dev/null +++ b/queue-6.9/dmaengine-idxd-fix-possible-use-after-free-in-irq_pr.patch @@ -0,0 +1,48 @@ +From 3f56909aaec4632c3e80547f25e160490795d27c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 09:24:44 +0800 +Subject: dmaengine: idxd: Fix possible Use-After-Free in irq_process_work_list + +From: Li RongQing + +[ Upstream commit e3215deca4520773cd2b155bed164c12365149a7 ] + +Use list_for_each_entry_safe() to allow iterating through the list and +deleting the entry in the iteration process. The descriptor is freed via +idxd_desc_complete() and there's a slight chance may cause issue for +the list iterator when the descriptor is reused by another thread +without it being deleted from the list. + +Fixes: 16e19e11228b ("dmaengine: idxd: Fix list corruption in description completion") +Signed-off-by: Li RongQing +Reviewed-by: Dave Jiang +Reviewed-by: Fenghua Yu +Link: https://lore.kernel.org/r/20240603012444.11902-1-lirongqing@baidu.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/idxd/irq.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/dma/idxd/irq.c b/drivers/dma/idxd/irq.c +index 8dc029c865515..fc049c9c9892e 100644 +--- a/drivers/dma/idxd/irq.c ++++ b/drivers/dma/idxd/irq.c +@@ -611,11 +611,13 @@ static void irq_process_work_list(struct idxd_irq_entry *irq_entry) + + spin_unlock(&irq_entry->list_lock); + +- list_for_each_entry(desc, &flist, list) { ++ list_for_each_entry_safe(desc, n, &flist, list) { + /* + * Check against the original status as ABORT is software defined + * and 0xff, which DSA_COMP_STATUS_MASK can mask out. + */ ++ list_del(&desc->list); ++ + if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) { + idxd_desc_complete(desc, IDXD_COMPLETE_ABORT, true); + continue; +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-ioatdma-fix-error-path-in-ioat3_dma_probe.patch b/queue-6.9/dmaengine-ioatdma-fix-error-path-in-ioat3_dma_probe.patch new file mode 100644 index 00000000000..89207fd2b69 --- /dev/null +++ b/queue-6.9/dmaengine-ioatdma-fix-error-path-in-ioat3_dma_probe.patch @@ -0,0 +1,94 @@ +From 2140e36c960952ed879145aa49c0531acf3d7f25 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 09:09:24 +0300 +Subject: dmaengine: ioatdma: Fix error path in ioat3_dma_probe() + +From: Nikita Shubin + +[ Upstream commit f0dc9fda2e0ee9e01496c2f5aca3a831131fad79 ] + +Make sure we are disabling interrupts and destroying DMA pool if +pcie_capability_read/write_word() call failed. + +Fixes: 511deae0261c ("dmaengine: ioatdma: disable relaxed ordering for ioatdma") +Signed-off-by: Nikita Shubin +Reviewed-by: Dave Jiang +Link: https://lore.kernel.org/r/20240528-ioatdma-fixes-v2-2-a9f2fbe26ab1@yadro.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/ioat/init.c | 33 +++++++++++++++------------------ + 1 file changed, 15 insertions(+), 18 deletions(-) + +diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c +index e76e507ae898c..26964b7c8cf14 100644 +--- a/drivers/dma/ioat/init.c ++++ b/drivers/dma/ioat/init.c +@@ -534,18 +534,6 @@ static int ioat_probe(struct ioatdma_device *ioat_dma) + return err; + } + +-static int ioat_register(struct ioatdma_device *ioat_dma) +-{ +- int err = dma_async_device_register(&ioat_dma->dma_dev); +- +- if (err) { +- ioat_disable_interrupts(ioat_dma); +- dma_pool_destroy(ioat_dma->completion_pool); +- } +- +- return err; +-} +- + static void ioat_dma_remove(struct ioatdma_device *ioat_dma) + { + struct dma_device *dma = &ioat_dma->dma_dev; +@@ -1181,9 +1169,9 @@ static int ioat3_dma_probe(struct ioatdma_device *ioat_dma, int dca) + ioat_chan->reg_base + IOAT_DCACTRL_OFFSET); + } + +- err = ioat_register(ioat_dma); ++ err = dma_async_device_register(&ioat_dma->dma_dev); + if (err) +- return err; ++ goto err_disable_interrupts; + + ioat_kobject_add(ioat_dma, &ioat_ktype); + +@@ -1192,20 +1180,29 @@ static int ioat3_dma_probe(struct ioatdma_device *ioat_dma, int dca) + + /* disable relaxed ordering */ + err = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &val16); +- if (err) +- return pcibios_err_to_errno(err); ++ if (err) { ++ err = pcibios_err_to_errno(err); ++ goto err_disable_interrupts; ++ } + + /* clear relaxed ordering enable */ + val16 &= ~PCI_EXP_DEVCTL_RELAX_EN; + err = pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, val16); +- if (err) +- return pcibios_err_to_errno(err); ++ if (err) { ++ err = pcibios_err_to_errno(err); ++ goto err_disable_interrupts; ++ } + + if (ioat_dma->cap & IOAT_CAP_DPS) + writeb(ioat_pending_level + 1, + ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET); + + return 0; ++ ++err_disable_interrupts: ++ ioat_disable_interrupts(ioat_dma); ++ dma_pool_destroy(ioat_dma->completion_pool); ++ return err; + } + + static void ioat_shutdown(struct pci_dev *pdev) +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-ioatdma-fix-kmemleak-in-ioat_pci_probe.patch b/queue-6.9/dmaengine-ioatdma-fix-kmemleak-in-ioat_pci_probe.patch new file mode 100644 index 00000000000..4fb8b3ccc56 --- /dev/null +++ b/queue-6.9/dmaengine-ioatdma-fix-kmemleak-in-ioat_pci_probe.patch @@ -0,0 +1,66 @@ +From 9978d90310f86b28f19e586f3bb678db9cd9a310 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 09:09:25 +0300 +Subject: dmaengine: ioatdma: Fix kmemleak in ioat_pci_probe() + +From: Nikita Shubin + +[ Upstream commit 29b7cd255f3628e0d65be33a939d8b5bba10aa62 ] + +If probing fails we end up with leaking ioatdma_device and each +allocated channel. + +Following kmemleak easy to reproduce by injecting an error in +ioat_alloc_chan_resources() when doing ioat_dma_self_test(). + +unreferenced object 0xffff888014ad5800 (size 1024): [..] + [] kmemleak_alloc+0x4a/0x80 + [] kmalloc_trace+0x270/0x2f0 + [] ioat_pci_probe+0xc1/0x1c0 [ioatdma] +[..] + +repeated for each ioatdma channel: + +unreferenced object 0xffff8880148e5c00 (size 512): [..] + [] kmemleak_alloc+0x4a/0x80 + [] kmalloc_trace+0x270/0x2f0 + [] ioat_enumerate_channels+0x101/0x2d0 [ioatdma] + [] ioat3_dma_probe+0x4d6/0x970 [ioatdma] + [] ioat_pci_probe+0x181/0x1c0 [ioatdma] +[..] + +Fixes: bf453a0a18b2 ("dmaengine: ioat: Support in-use unbind") +Signed-off-by: Nikita Shubin +Reviewed-by: Dave Jiang +Link: https://lore.kernel.org/r/20240528-ioatdma-fixes-v2-3-a9f2fbe26ab1@yadro.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/ioat/init.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c +index 26964b7c8cf14..cf688b0c8444c 100644 +--- a/drivers/dma/ioat/init.c ++++ b/drivers/dma/ioat/init.c +@@ -1347,6 +1347,7 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + void __iomem * const *iomap; + struct device *dev = &pdev->dev; + struct ioatdma_device *device; ++ unsigned int i; + u8 version; + int err; + +@@ -1384,6 +1385,9 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + + err = ioat3_dma_probe(device, ioat_dca_enabled); + if (err) { ++ for (i = 0; i < IOAT_MAX_CHANS; i++) ++ kfree(device->idx[i]); ++ kfree(device); + dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n"); + return -ENODEV; + } +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-ioatdma-fix-leaking-on-version-mismatch.patch b/queue-6.9/dmaengine-ioatdma-fix-leaking-on-version-mismatch.patch new file mode 100644 index 00000000000..a58da291e65 --- /dev/null +++ b/queue-6.9/dmaengine-ioatdma-fix-leaking-on-version-mismatch.patch @@ -0,0 +1,69 @@ +From 5de2a980348dc7ed59d63b28f8a985f07b05bfdf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 09:09:23 +0300 +Subject: dmaengine: ioatdma: Fix leaking on version mismatch + +From: Nikita Shubin + +[ Upstream commit 1b11b4ef6bd68591dcaf8423c7d05e794e6aec6f ] + +Fix leaking ioatdma_device if I/OAT version is less than IOAT_VER_3_0. + +Fixes: bf453a0a18b2 ("dmaengine: ioat: Support in-use unbind") +Signed-off-by: Nikita Shubin +Reviewed-by: Dave Jiang +Link: https://lore.kernel.org/r/20240528-ioatdma-fixes-v2-1-a9f2fbe26ab1@yadro.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/ioat/init.c | 17 ++++++++++------- + 1 file changed, 10 insertions(+), 7 deletions(-) + +diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c +index 9c364e92cb828..e76e507ae898c 100644 +--- a/drivers/dma/ioat/init.c ++++ b/drivers/dma/ioat/init.c +@@ -1350,6 +1350,7 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + void __iomem * const *iomap; + struct device *dev = &pdev->dev; + struct ioatdma_device *device; ++ u8 version; + int err; + + err = pcim_enable_device(pdev); +@@ -1363,6 +1364,10 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + if (!iomap) + return -ENOMEM; + ++ version = readb(iomap[IOAT_MMIO_BAR] + IOAT_VER_OFFSET); ++ if (version < IOAT_VER_3_0) ++ return -ENODEV; ++ + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); + if (err) + return err; +@@ -1373,16 +1378,14 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + pci_set_master(pdev); + pci_set_drvdata(pdev, device); + +- device->version = readb(device->reg_base + IOAT_VER_OFFSET); ++ device->version = version; + if (device->version >= IOAT_VER_3_4) + ioat_dca_enabled = 0; +- if (device->version >= IOAT_VER_3_0) { +- if (is_skx_ioat(pdev)) +- device->version = IOAT_VER_3_2; +- err = ioat3_dma_probe(device, ioat_dca_enabled); +- } else +- return -ENODEV; + ++ if (is_skx_ioat(pdev)) ++ device->version = IOAT_VER_3_2; ++ ++ err = ioat3_dma_probe(device, ioat_dca_enabled); + if (err) { + dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n"); + return -ENODEV; +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-ioatdma-fix-missing-kmem_cache_destroy.patch b/queue-6.9/dmaengine-ioatdma-fix-missing-kmem_cache_destroy.patch new file mode 100644 index 00000000000..800bb509ee5 --- /dev/null +++ b/queue-6.9/dmaengine-ioatdma-fix-missing-kmem_cache_destroy.patch @@ -0,0 +1,46 @@ +From 3ba03cf537cf6a6bc0f309e13248ef0a25adfab0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 13:52:31 +0300 +Subject: dmaengine: ioatdma: Fix missing kmem_cache_destroy() + +From: Nikita Shubin + +[ Upstream commit 5422145d0b749ad554ada772133b9b20f9fb0ec8 ] + +Fix missing kmem_cache_destroy() for ioat_sed_cache in +ioat_exit_module(). + +Noticed via: + +``` +modprobe ioatdma +rmmod ioatdma +modprobe ioatdma +debugfs: Directory 'ioat_sed_ent' with parent 'slab' already present! +``` + +Fixes: c0f28ce66ecf ("dmaengine: ioatdma: move all the init routines") +Signed-off-by: Nikita Shubin +Acked-by: Dave Jiang +Link: https://lore.kernel.org/r/20240514-ioatdma_fixes-v1-1-2776a0913254@yadro.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/ioat/init.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c +index cf688b0c8444c..e8f45a7fded43 100644 +--- a/drivers/dma/ioat/init.c ++++ b/drivers/dma/ioat/init.c +@@ -1449,6 +1449,7 @@ module_init(ioat_init_module); + static void __exit ioat_exit_module(void) + { + pci_unregister_driver(&ioat_pci_driver); ++ kmem_cache_destroy(ioat_sed_cache); + kmem_cache_destroy(ioat_cache); + } + module_exit(ioat_exit_module); +-- +2.43.0 + diff --git a/queue-6.9/dmaengine-ti-k3-udma-glue-fix-of_k3_udma_glue_parse_.patch b/queue-6.9/dmaengine-ti-k3-udma-glue-fix-of_k3_udma_glue_parse_.patch new file mode 100644 index 00000000000..7cb6f8a5c53 --- /dev/null +++ b/queue-6.9/dmaengine-ti-k3-udma-glue-fix-of_k3_udma_glue_parse_.patch @@ -0,0 +1,45 @@ +From 011b9a68c89f31775db1af37c78c4c21ef07d3f7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 2 Jun 2024 07:03:19 +0530 +Subject: dmaengine: ti: k3-udma-glue: Fix of_k3_udma_glue_parse_chn_by_id() + +From: Siddharth Vadapalli + +[ Upstream commit ba27e9d2207784da748b19170a2e56bd7770bd81 ] + +The of_k3_udma_glue_parse_chn_by_id() helper function erroneously +invokes "of_node_put()" on the "udmax_np" device-node passed to it, +without having incremented its reference count at any point. Fix it. + +Fixes: 81a1f90f20af ("dmaengine: ti: k3-udma-glue: Add function to parse channel by ID") +Signed-off-by: Siddharth Vadapalli +Acked-by: Peter Ujfalusi +Acked-by: Peter Ujfalusi@gmail.com +Link: https://lore.kernel.org/r/20240602013319.2975894-1-s-vadapalli@ti.com +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/dma/ti/k3-udma-glue.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/drivers/dma/ti/k3-udma-glue.c b/drivers/dma/ti/k3-udma-glue.c +index c9b93055dc9d3..f0a399cf45b2a 100644 +--- a/drivers/dma/ti/k3-udma-glue.c ++++ b/drivers/dma/ti/k3-udma-glue.c +@@ -200,12 +200,9 @@ of_k3_udma_glue_parse_chn_by_id(struct device_node *udmax_np, struct k3_udma_glu + + ret = of_k3_udma_glue_parse(udmax_np, common); + if (ret) +- goto out_put_spec; ++ return ret; + + ret = of_k3_udma_glue_parse_chn_common(common, thread_id, tx_chn); +- +-out_put_spec: +- of_node_put(udmax_np); + return ret; + } + +-- +2.43.0 + diff --git a/queue-6.9/drm-xe-vf-don-t-touch-guc-irq-registers-if-using-mem.patch b/queue-6.9/drm-xe-vf-don-t-touch-guc-irq-registers-if-using-mem.patch new file mode 100644 index 00000000000..c045ee4173b --- /dev/null +++ b/queue-6.9/drm-xe-vf-don-t-touch-guc-irq-registers-if-using-mem.patch @@ -0,0 +1,54 @@ +From 3f499f574a42151dbb62ec059ae2720e94036411 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 17:47:36 +0200 +Subject: drm/xe/vf: Don't touch GuC irq registers if using memory irqs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Michal Wajdeczko + +[ Upstream commit d21d44dbdde83c4a8553c95de1853e63e88d7954 ] + +On platforms where VFs are using memory based interrupts, we +missed invalid access to no longer existing interrupt registers, +as we keep them marked with XE_REG_OPTION_VF. To fix that just +either setup memirq vectors in GuC or enable legacy interrupts. + +Fixes: aef4eb7c7dec ("drm/xe/vf: Setup memory based interrupts in GuC") +Signed-off-by: Michal Wajdeczko +Cc: Matt Roper +Reviewed-by: Matt Roper +Link: https://patchwork.freedesktop.org/patch/msgid/20240617154736.685-1-michal.wajdeczko@intel.com +(cherry picked from commit f0ccd2d805e55e12b430d5d6b9acd9f891af455e) +Signed-off-by: Thomas Hellström +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xe/xe_guc.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c +index 0d2a2dd13f112..a38f59b4356d4 100644 +--- a/drivers/gpu/drm/xe/xe_guc.c ++++ b/drivers/gpu/drm/xe/xe_guc.c +@@ -643,8 +643,6 @@ int xe_guc_enable_communication(struct xe_guc *guc) + struct xe_device *xe = guc_to_xe(guc); + int err; + +- guc_enable_irq(guc); +- + if (IS_SRIOV_VF(xe) && xe_device_has_memirq(xe)) { + struct xe_gt *gt = guc_to_gt(guc); + struct xe_tile *tile = gt_to_tile(gt); +@@ -652,6 +650,8 @@ int xe_guc_enable_communication(struct xe_guc *guc) + err = xe_memirq_init_guc(&tile->sriov.vf.memirq, guc); + if (err) + return err; ++ } else { ++ guc_enable_irq(guc); + } + + xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK, +-- +2.43.0 + diff --git a/queue-6.9/firmware-psci-fix-return-value-from-psci_system_susp.patch b/queue-6.9/firmware-psci-fix-return-value-from-psci_system_susp.patch new file mode 100644 index 00000000000..27de11d826f --- /dev/null +++ b/queue-6.9/firmware-psci-fix-return-value-from-psci_system_susp.patch @@ -0,0 +1,49 @@ +From 1a4ab8d26b6c48824d3326fc4518f951901a5198 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 May 2024 10:55:28 +0100 +Subject: firmware: psci: Fix return value from psci_system_suspend() + +From: Sudeep Holla + +[ Upstream commit e7c3696d4692e8046d25f6e63f983e934e12f2c5 ] + +Currently we return the value from invoke_psci_fn() directly as return +value from psci_system_suspend(). It is wrong to send the PSCI interface +return value directly. psci_to_linux_errno() provide the mapping from +PSCI return value to the one that can be returned to the callers within +the kernel. + +Use psci_to_linux_errno() to convert and return the correct value from +psci_system_suspend(). + +Fixes: faf7ec4a92c0 ("drivers: firmware: psci: add system suspend support") +Acked-by: Mark Rutland +Signed-off-by: Sudeep Holla +Link: https://lore.kernel.org/r/20240515095528.1949992-1-sudeep.holla@arm.com +Signed-off-by: Arnd Bergmann +Signed-off-by: Sasha Levin +--- + drivers/firmware/psci/psci.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c +index d9629ff878619..2328ca58bba61 100644 +--- a/drivers/firmware/psci/psci.c ++++ b/drivers/firmware/psci/psci.c +@@ -497,10 +497,12 @@ int psci_cpu_suspend_enter(u32 state) + + static int psci_system_suspend(unsigned long unused) + { ++ int err; + phys_addr_t pa_cpu_resume = __pa_symbol(cpu_resume); + +- return invoke_psci_fn(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), ++ err = invoke_psci_fn(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), + pa_cpu_resume, 0, 0); ++ return psci_to_linux_errno(err); + } + + static int psci_system_suspend_enter(suspend_state_t state) +-- +2.43.0 + diff --git a/queue-6.9/io_uring-rsrc-fix-incorrect-assignment-of-iter-nr_se.patch b/queue-6.9/io_uring-rsrc-fix-incorrect-assignment-of-iter-nr_se.patch new file mode 100644 index 00000000000..25ffc692b1f --- /dev/null +++ b/queue-6.9/io_uring-rsrc-fix-incorrect-assignment-of-iter-nr_se.patch @@ -0,0 +1,39 @@ +From cdeee2f2ffe442d9df45bb8740ac7217212f6fab Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jun 2024 14:38:19 +0800 +Subject: io_uring/rsrc: fix incorrect assignment of iter->nr_segs in + io_import_fixed + +From: Chenliang Li + +[ Upstream commit a23800f08a60787dfbf2b87b2e6ed411cb629859 ] + +In io_import_fixed when advancing the iter within the first bvec, the +iter->nr_segs is set to bvec->bv_len. nr_segs should be the number of +bvecs, plus we don't need to adjust it here, so just remove it. + +Fixes: b000ae0ec2d7 ("io_uring/rsrc: optimise single entry advance") +Signed-off-by: Chenliang Li +Reviewed-by: Pavel Begunkov +Link: https://lore.kernel.org/r/20240619063819.2445-1-cliang01.li@samsung.com +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + io_uring/rsrc.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/io_uring/rsrc.c b/io_uring/rsrc.c +index 87f9aa7cf9255..956e2c715eb48 100644 +--- a/io_uring/rsrc.c ++++ b/io_uring/rsrc.c +@@ -1105,7 +1105,6 @@ int io_import_fixed(int ddir, struct iov_iter *iter, + * branch doesn't expect non PAGE_SIZE'd chunks. + */ + iter->bvec = bvec; +- iter->nr_segs = bvec->bv_len; + iter->count -= offset; + iter->iov_offset = offset; + } else { +-- +2.43.0 + diff --git a/queue-6.9/kvm-stop-processing-all-memslots-when-null-mmu_notif.patch b/queue-6.9/kvm-stop-processing-all-memslots-when-null-mmu_notif.patch new file mode 100644 index 00000000000..79af3b4ab4c --- /dev/null +++ b/queue-6.9/kvm-stop-processing-all-memslots-when-null-mmu_notif.patch @@ -0,0 +1,88 @@ +From 47a29c14df8610cf93fe93f05cf3becaf0d629da Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 09:41:51 -0500 +Subject: KVM: Stop processing *all* memslots when "null" mmu_notifier handler + is found + +From: Babu Moger + +[ Upstream commit c3f3edf73a8f854f8766a69d2734198a58762e33 ] + +Bail from outer address space loop, not just the inner memslot loop, when +a "null" handler is encountered by __kvm_handle_hva_range(), which is the +intended behavior. On x86, which has multiple address spaces thanks to +SMM emulation, breaking from just the memslot loop results in undefined +behavior due to assigning the non-existent return value from kvm_null_fn() +to a bool. + +In practice, the bug is benign as kvm_mmu_notifier_invalidate_range_end() +is the only caller that passes handler=kvm_null_fn, and it doesn't set +flush_on_ret, i.e. assigning garbage to r.ret is ultimately ignored. And +for most configuration the compiler elides the entire sequence, i.e. there +is no undefined behavior at runtime. + + ------------[ cut here ]------------ + UBSAN: invalid-load in arch/x86/kvm/../../../virt/kvm/kvm_main.c:655:10 + load of value 160 is not a valid value for type '_Bool' + CPU: 370 PID: 8246 Comm: CPU 0/KVM Not tainted 6.8.2-amdsos-build58-ubuntu-22.04+ #1 + Hardware name: AMD Corporation Sh54p/Sh54p, BIOS WPC4429N 04/25/2024 + Call Trace: + + dump_stack_lvl+0x48/0x60 + ubsan_epilogue+0x5/0x30 + __ubsan_handle_load_invalid_value+0x79/0x80 + kvm_mmu_notifier_invalidate_range_end.cold+0x18/0x4f [kvm] + __mmu_notifier_invalidate_range_end+0x63/0xe0 + __split_huge_pmd+0x367/0xfc0 + do_huge_pmd_wp_page+0x1cc/0x380 + __handle_mm_fault+0x8ee/0xe50 + handle_mm_fault+0xe4/0x4a0 + __get_user_pages+0x190/0x840 + get_user_pages_unlocked+0xe0/0x590 + hva_to_pfn+0x114/0x550 [kvm] + kvm_faultin_pfn+0xed/0x5b0 [kvm] + kvm_tdp_page_fault+0x123/0x170 [kvm] + kvm_mmu_page_fault+0x244/0xaa0 [kvm] + vcpu_enter_guest+0x592/0x1070 [kvm] + kvm_arch_vcpu_ioctl_run+0x145/0x8a0 [kvm] + kvm_vcpu_ioctl+0x288/0x6d0 [kvm] + __x64_sys_ioctl+0x8f/0xd0 + do_syscall_64+0x77/0x120 + entry_SYSCALL_64_after_hwframe+0x6e/0x76 + + ---[ end trace ]--- + +Fixes: 071064f14d87 ("KVM: Don't take mmu_lock for range invalidation unless necessary") +Signed-off-by: Babu Moger +Link: https://lore.kernel.org/r/b8723d39903b64c241c50f5513f804390c7b5eec.1718203311.git.babu.moger@amd.com +[sean: massage changelog] +Signed-off-by: Sean Christopherson +Signed-off-by: Sasha Levin +--- + virt/kvm/kvm_main.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c +index ff0a20565f908..3b7fa9a62c62f 100644 +--- a/virt/kvm/kvm_main.c ++++ b/virt/kvm/kvm_main.c +@@ -650,7 +650,7 @@ static __always_inline kvm_mn_ret_t __kvm_handle_hva_range(struct kvm *kvm, + range->on_lock(kvm); + + if (IS_KVM_NULL_FN(range->handler)) +- break; ++ goto mmu_unlock; + } + r.ret |= range->handler(kvm, &gfn_range); + } +@@ -659,6 +659,7 @@ static __always_inline kvm_mn_ret_t __kvm_handle_hva_range(struct kvm *kvm, + if (range->flush_on_ret && r.ret) + kvm_flush_remote_tlbs(kvm); + ++mmu_unlock: + if (r.found_memslot) + KVM_MMU_UNLOCK(kvm); + +-- +2.43.0 + diff --git a/queue-6.9/loongarch-only-allow-objtool-orc-unwinder-if-toolcha.patch b/queue-6.9/loongarch-only-allow-objtool-orc-unwinder-if-toolcha.patch new file mode 100644 index 00000000000..cfb8b81c8b5 --- /dev/null +++ b/queue-6.9/loongarch-only-allow-objtool-orc-unwinder-if-toolcha.patch @@ -0,0 +1,78 @@ +From caa9862de683a0591338707ee7f366bd947a8015 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 10:18:40 +0800 +Subject: LoongArch: Only allow OBJTOOL & ORC unwinder if toolchain supports + -mthin-add-sub + +From: Xi Ruoyao + +[ Upstream commit 120dd4118e58dbda2ddb1dcf55f3c56cdfe8cee0 ] + +GAS <= 2.41 does not support generating R_LARCH_{32,64}_PCREL for +"label - ." and it generates R_LARCH_{ADD,SUB}{32,64} pairs instead. +Objtool cannot handle R_LARCH_{ADD,SUB}{32,64} pair in __jump_table +(static key implementation) and etc. so it will produce some warnings. +This is causing the kernel CI systems to complain everywhere. + +For GAS we can check if -mthin-add-sub option is available to know if +R_LARCH_{32,64}_PCREL are supported. + +For Clang, we require Clang >= 18 and Clang >= 17 already supports +R_LARCH_{32,64}_PCREL. But unfortunately Clang has some other issues, +so we disable objtool for Clang at present. + +Note that __jump_table here is not generated by the compiler, so +-fno-jump-table is completely irrelevant for this issue. + +Fixes: cb8a2ef0848c ("LoongArch: Add ORC stack unwinder support") +Closes: https://lore.kernel.org/loongarch/Zl5m1ZlVmGKitAof@yujie-X299/ +Closes: https://lore.kernel.org/loongarch/ZlY1gDDPi_mNrwJ1@slm.duckdns.org/ +Closes: https://lore.kernel.org/loongarch/1717478006.038663-1-hengqi@linux.alibaba.com/ +Link: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=816029e06768 +Link: https://github.com/llvm/llvm-project/commit/42cb3c6346fc +Signed-off-by: Xi Ruoyao +Signed-off-by: Huacai Chen +Signed-off-by: Sasha Levin +--- + arch/loongarch/Kconfig | 5 ++++- + arch/loongarch/Kconfig.debug | 1 + + 2 files changed, 5 insertions(+), 1 deletion(-) + +diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig +index 54ad04dacdee9..d1b94ce58f793 100644 +--- a/arch/loongarch/Kconfig ++++ b/arch/loongarch/Kconfig +@@ -138,7 +138,7 @@ config LOONGARCH + select HAVE_LIVEPATCH + select HAVE_MOD_ARCH_SPECIFIC + select HAVE_NMI +- select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS ++ select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS && AS_HAS_THIN_ADD_SUB && !CC_IS_CLANG + select HAVE_PCI + select HAVE_PERF_EVENTS + select HAVE_PERF_REGS +@@ -257,6 +257,9 @@ config AS_HAS_EXPLICIT_RELOCS + config AS_HAS_FCSR_CLASS + def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) + ++config AS_HAS_THIN_ADD_SUB ++ def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) ++ + config AS_HAS_LSX_EXTENSION + def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0) + +diff --git a/arch/loongarch/Kconfig.debug b/arch/loongarch/Kconfig.debug +index 98d60630c3d4b..8b2ce5b5d43e8 100644 +--- a/arch/loongarch/Kconfig.debug ++++ b/arch/loongarch/Kconfig.debug +@@ -28,6 +28,7 @@ config UNWINDER_PROLOGUE + + config UNWINDER_ORC + bool "ORC unwinder" ++ depends on HAVE_OBJTOOL + select OBJTOOL + help + This option enables the ORC (Oops Rewind Capability) unwinder for +-- +2.43.0 + diff --git a/queue-6.9/nfsd-fix-oops-when-reading-pool_stats-before-server-.patch b/queue-6.9/nfsd-fix-oops-when-reading-pool_stats-before-server-.patch new file mode 100644 index 00000000000..27a11d80207 --- /dev/null +++ b/queue-6.9/nfsd-fix-oops-when-reading-pool_stats-before-server-.patch @@ -0,0 +1,57 @@ +From 388a527c6cf55bde74bc0891d0b4c38f50d896be Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 07:54:08 -0400 +Subject: nfsd: fix oops when reading pool_stats before server is started + +From: Jeff Layton + +[ Upstream commit 8e948c365d9c10b685d1deb946bd833d6a9b43e0 ] + +Sourbh reported an oops that is triggerable by trying to read the +pool_stats procfile before nfsd had been started. Move the check for a +NULL serv in svc_pool_stats_start above the mutex acquisition, and fix +the stop routine not to unlock the mutex if there is no serv yet. + +Fixes: 7b207ccd9833 ("svc: don't hold reference for poolstats, only mutex.") +Reported-by: Sourabh Jain +Signed-off-by: Jeff Layton +Tested-by: Sourabh Jain +Signed-off-by: Chuck Lever +Signed-off-by: Sasha Levin +--- + net/sunrpc/svc_xprt.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/net/sunrpc/svc_xprt.c b/net/sunrpc/svc_xprt.c +index b4a85a227bd7d..1a2982051f986 100644 +--- a/net/sunrpc/svc_xprt.c ++++ b/net/sunrpc/svc_xprt.c +@@ -1371,12 +1371,13 @@ static void *svc_pool_stats_start(struct seq_file *m, loff_t *pos) + + dprintk("svc_pool_stats_start, *pidx=%u\n", pidx); + ++ if (!si->serv) ++ return NULL; ++ + mutex_lock(si->mutex); + + if (!pidx) + return SEQ_START_TOKEN; +- if (!si->serv) +- return NULL; + return pidx > si->serv->sv_nrpools ? NULL + : &si->serv->sv_pools[pidx - 1]; + } +@@ -1408,7 +1409,8 @@ static void svc_pool_stats_stop(struct seq_file *m, void *p) + { + struct svc_info *si = m->private; + +- mutex_unlock(si->mutex); ++ if (si->serv) ++ mutex_unlock(si->mutex); + } + + static int svc_pool_stats_show(struct seq_file *m, void *p) +-- +2.43.0 + diff --git a/queue-6.9/phy-qcom-qmp-combo-switch-from-v6-to-v6-n4-register-.patch b/queue-6.9/phy-qcom-qmp-combo-switch-from-v6-to-v6-n4-register-.patch new file mode 100644 index 00000000000..64d0332e6e8 --- /dev/null +++ b/queue-6.9/phy-qcom-qmp-combo-switch-from-v6-to-v6-n4-register-.patch @@ -0,0 +1,292 @@ +From 5553ee10ece9a39a93801802d572793251202e85 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 10:20:37 +0300 +Subject: phy: qcom: qmp-combo: Switch from V6 to V6 N4 register offsets + +From: Abel Vesa + +[ Upstream commit 163c1a356a847ab4767200fd4a45b3f8e4ddc900 ] + +Currently, none of the X1E80100 supported boards upstream have enabled +DP. As for USB, the reason it is not broken when it's obvious that the +offsets are wrong is because the only difference with respect to USB is +the difference in register name. The V6 uses QPHY_V6_PCS_CDR_RESET_TIME +while V6 N4 uses QPHY_V6_N4_PCS_RX_CONFIG. Now, in order for the DP to +work, the DP serdes tables need to be added as they have different +values for V6 N4 when compared to V6 ones, even though they use the same +V6 offsets. While at it, switch swing and pre-emphasis tables to V6 as +well. + +Fixes: d7b3579f84f7 ("phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys") +Co-developed-by: Kuogee Hsieh +Signed-off-by: Kuogee Hsieh +Signed-off-by: Abel Vesa +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-3-be8a0b882117@linaro.org +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 189 ++++++++++++++++++---- + drivers/phy/qualcomm/phy-qcom-qmp.h | 2 + + 2 files changed, 162 insertions(+), 29 deletions(-) + +diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +index acc2b5b9ea255..b8919443e46c9 100644 +--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c ++++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +@@ -187,6 +187,31 @@ static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { + [QPHY_TX_TRANSCEIVER_BIAS_EN] = QSERDES_V6_TX_TRANSCEIVER_BIAS_EN, + }; + ++static const unsigned int qmp_v6_n4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { ++ [QPHY_SW_RESET] = QPHY_V6_N4_PCS_SW_RESET, ++ [QPHY_START_CTRL] = QPHY_V6_N4_PCS_START_CONTROL, ++ [QPHY_PCS_STATUS] = QPHY_V6_N4_PCS_PCS_STATUS1, ++ [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_N4_PCS_POWER_DOWN_CONTROL, ++ ++ /* In PCS_USB */ ++ [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL, ++ [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, ++ ++ [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, ++ [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, ++ [QPHY_COM_CMN_STATUS] = QSERDES_V6_COM_CMN_STATUS, ++ [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, ++ ++ [QPHY_DP_PHY_STATUS] = QSERDES_V6_DP_PHY_STATUS, ++ [QPHY_DP_PHY_VCO_DIV] = QSERDES_V6_DP_PHY_VCO_DIV, ++ ++ [QPHY_TX_TX_POL_INV] = QSERDES_V6_N4_TX_TX_POL_INV, ++ [QPHY_TX_TX_DRV_LVL] = QSERDES_V6_N4_TX_TX_DRV_LVL, ++ [QPHY_TX_TX_EMP_POST1_LVL] = QSERDES_V6_N4_TX_TX_EMP_POST1_LVL, ++ [QPHY_TX_HIGHZ_DRVR_EN] = QSERDES_V6_N4_TX_HIGHZ_DRVR_EN, ++ [QPHY_TX_TRANSCEIVER_BIAS_EN] = QSERDES_V6_N4_TX_TRANSCEIVER_BIAS_EN, ++}; ++ + static const struct qmp_phy_init_tbl qmp_v3_usb3_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_IVCO, 0x07), + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYSCLK_EN_SEL, 0x14), +@@ -997,6 +1022,31 @@ static const struct qmp_phy_init_tbl qmp_v6_dp_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0x0f), + }; + ++static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SVS_MODE_CLK_SEL, 0x15), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_EN_SEL, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYS_CLK_CTRL, 0x02), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_ENABLE1, 0x0c), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_BUF_ENABLE, 0x06), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_SELECT, 0x30), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_IVCO, 0x07), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE0, 0x36), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE0, 0x16), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE0, 0x06), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE0, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE0, 0xc0), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_CONFIG_1, 0x12), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_INTEGLOOP_GAIN0_MODE0, 0x3f), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_INTEGLOOP_GAIN1_MODE0, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_MAP, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BG_TIMER, 0x0a), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CORE_CLK_DIV_MODE0, 0x14), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_CTRL, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, 0x17), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0x0f), ++}; ++ + static const struct qmp_phy_init_tbl qmp_v6_dp_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_TX_VMODE_CTRL1, 0x40), + QMP_PHY_INIT_CFG(QSERDES_V6_TX_PRE_STALL_LDO_BOOST_EN, 0x30), +@@ -1011,6 +1061,19 @@ static const struct qmp_phy_init_tbl qmp_v6_dp_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_TX_TX_BAND, 0x4), + }; + ++static const struct qmp_phy_init_tbl qmp_v6_n4_dp_tx_tbl[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_VMODE_CTRL1, 0x40), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_PRE_STALL_LDO_BOOST_EN, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_INTERFACE_SELECT, 0xff), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_CLKBUF_ENABLE, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_RESET_TSYNC_EN, 0x03), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_TRAN_DRVR_EMP_EN, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_PARRATE_REC_DETECT_IDLE_EN, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_TX, 0x11), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_RX, 0x11), ++ QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_TX_BAND, 0x1), ++}; ++ + static const struct qmp_phy_init_tbl qmp_v6_dp_serdes_tbl_rbr[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), +@@ -1059,6 +1122,74 @@ static const struct qmp_phy_init_tbl qmp_v6_dp_serdes_tbl_hbr3[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), + }; + ++static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_rbr[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x05), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x0b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x37), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x92), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), ++}; ++ ++static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x03), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x0b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x07), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x07), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x92), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), ++}; ++ ++static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr2[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x46), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x05), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x0e), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x97), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x10), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x18), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x02), ++}; ++ ++static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr3[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x0b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x17), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x15), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x92), ++ QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), ++}; ++ + static const struct qmp_phy_init_tbl sc8280xp_usb43dp_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_SSC_PER1, 0x31), +@@ -1273,20 +1404,20 @@ static const struct qmp_phy_init_tbl x1e80100_usb43dp_rx_tbl[] = { + }; + + static const struct qmp_phy_init_tbl x1e80100_usb43dp_pcs_tbl[] = { +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x55), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0xd4), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x30), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b), +- QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG1, 0xc4), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG2, 0x89), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG3, 0x20), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG6, 0x13), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_REFGEN_REQ_CONFIG1, 0x21), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RX_SIGDET_LVL, 0x55), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RX_CONFIG, 0x0a), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG1, 0xd4), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG2, 0x30), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_PCS_TX_RX_CONFIG, 0x0c), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_EQ_CONFIG1, 0x4b), ++ QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_EQ_CONFIG5, 0x10), + }; + + static const struct qmp_phy_init_tbl x1e80100_usb43dp_pcs_usb_tbl[] = { +@@ -1794,22 +1925,22 @@ static const struct qmp_phy_cfg x1e80100_usb3dpphy_cfg = { + .pcs_usb_tbl = x1e80100_usb43dp_pcs_usb_tbl, + .pcs_usb_tbl_num = ARRAY_SIZE(x1e80100_usb43dp_pcs_usb_tbl), + +- .dp_serdes_tbl = qmp_v6_dp_serdes_tbl, +- .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl), +- .dp_tx_tbl = qmp_v6_dp_tx_tbl, +- .dp_tx_tbl_num = ARRAY_SIZE(qmp_v6_dp_tx_tbl), ++ .dp_serdes_tbl = qmp_v6_n4_dp_serdes_tbl, ++ .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl), ++ .dp_tx_tbl = qmp_v6_n4_dp_tx_tbl, ++ .dp_tx_tbl_num = ARRAY_SIZE(qmp_v6_n4_dp_tx_tbl), + +- .serdes_tbl_rbr = qmp_v6_dp_serdes_tbl_rbr, +- .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_rbr), +- .serdes_tbl_hbr = qmp_v6_dp_serdes_tbl_hbr, +- .serdes_tbl_hbr_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_hbr), +- .serdes_tbl_hbr2 = qmp_v6_dp_serdes_tbl_hbr2, +- .serdes_tbl_hbr2_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_hbr2), +- .serdes_tbl_hbr3 = qmp_v6_dp_serdes_tbl_hbr3, +- .serdes_tbl_hbr3_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_hbr3), ++ .serdes_tbl_rbr = qmp_v6_n4_dp_serdes_tbl_rbr, ++ .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_rbr), ++ .serdes_tbl_hbr = qmp_v6_n4_dp_serdes_tbl_hbr, ++ .serdes_tbl_hbr_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr), ++ .serdes_tbl_hbr2 = qmp_v6_n4_dp_serdes_tbl_hbr2, ++ .serdes_tbl_hbr2_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr2), ++ .serdes_tbl_hbr3 = qmp_v6_n4_dp_serdes_tbl_hbr3, ++ .serdes_tbl_hbr3_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr3), + +- .swing_hbr_rbr = &qmp_dp_v5_voltage_swing_hbr_rbr, +- .pre_emphasis_hbr_rbr = &qmp_dp_v5_pre_emphasis_hbr_rbr, ++ .swing_hbr_rbr = &qmp_dp_v6_voltage_swing_hbr_rbr, ++ .pre_emphasis_hbr_rbr = &qmp_dp_v6_pre_emphasis_hbr_rbr, + .swing_hbr3_hbr2 = &qmp_dp_v5_voltage_swing_hbr3_hbr2, + .pre_emphasis_hbr3_hbr2 = &qmp_dp_v5_pre_emphasis_hbr3_hbr2, + +@@ -1822,7 +1953,7 @@ static const struct qmp_phy_cfg x1e80100_usb3dpphy_cfg = { + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), +- .regs = qmp_v45_usb3phy_regs_layout, ++ .regs = qmp_v6_n4_usb3phy_regs_layout, + }; + + static const struct qmp_phy_cfg sm6350_usb3dpphy_cfg = { +diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h +index d10b8f653c4b2..d0f41e4aaa855 100644 +--- a/drivers/phy/qualcomm/phy-qcom-qmp.h ++++ b/drivers/phy/qualcomm/phy-qcom-qmp.h +@@ -46,6 +46,8 @@ + + #include "phy-qcom-qmp-pcs-v6.h" + ++#include "phy-qcom-qmp-pcs-v6-n4.h" ++ + #include "phy-qcom-qmp-pcs-v6_20.h" + + #include "phy-qcom-qmp-pcs-v7.h" +-- +2.43.0 + diff --git a/queue-6.9/phy-qcom-qmp-pcs-add-missing-v6-n4-register-offsets.patch b/queue-6.9/phy-qcom-qmp-pcs-add-missing-v6-n4-register-offsets.patch new file mode 100644 index 00000000000..57367d58fdc --- /dev/null +++ b/queue-6.9/phy-qcom-qmp-pcs-add-missing-v6-n4-register-offsets.patch @@ -0,0 +1,69 @@ +From 9bfe5bd76bcee13a0ca2580b62c05651c9ce06de Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 10:20:36 +0300 +Subject: phy: qcom-qmp: pcs: Add missing v6 N4 register offsets + +From: Abel Vesa + +[ Upstream commit 99bf89626335bbec71d8461f0faec88551440850 ] + +The new X1E80100 SoC bumps up the HW version of QMP phy to v6 N4 for +combo USB and DP PHY. Currently, the X1E80100 uses the pure V6 PCS +register offsets, which are different. Add the offsets so the +mentioned platform can be fixed later on. Add the new PCS offsets +in a dedicated header file. + +Fixes: d7b3579f84f7 ("phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys") +Co-developed-by: Kuogee Hsieh +Signed-off-by: Kuogee Hsieh +Signed-off-by: Abel Vesa +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-2-be8a0b882117@linaro.org +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6-n4.h | 32 +++++++++++++++++++ + 1 file changed, 32 insertions(+) + create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6-n4.h + +diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6-n4.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6-n4.h +new file mode 100644 +index 0000000000000..b3024714dab4e +--- /dev/null ++++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6-n4.h +@@ -0,0 +1,32 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (c) 2023, Linaro Limited ++ */ ++ ++#ifndef QCOM_PHY_QMP_PCS_V6_N4_H_ ++#define QCOM_PHY_QMP_PCS_V6_N4_H_ ++ ++/* Only for QMP V6 N4 PHY - USB/PCIe PCS registers */ ++#define QPHY_V6_N4_PCS_SW_RESET 0x000 ++#define QPHY_V6_N4_PCS_PCS_STATUS1 0x014 ++#define QPHY_V6_N4_PCS_POWER_DOWN_CONTROL 0x040 ++#define QPHY_V6_N4_PCS_START_CONTROL 0x044 ++#define QPHY_V6_N4_PCS_POWER_STATE_CONFIG1 0x090 ++#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG1 0x0c4 ++#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG2 0x0c8 ++#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG3 0x0cc ++#define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG6 0x0d8 ++#define QPHY_V6_N4_PCS_REFGEN_REQ_CONFIG1 0x0dc ++#define QPHY_V6_N4_PCS_RX_SIGDET_LVL 0x188 ++#define QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 ++#define QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 ++#define QPHY_V6_N4_PCS_RATE_SLEW_CNTRL1 0x198 ++#define QPHY_V6_N4_PCS_RX_CONFIG 0x1b0 ++#define QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG1 0x1c0 ++#define QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG2 0x1c4 ++#define QPHY_V6_N4_PCS_PCS_TX_RX_CONFIG 0x1d0 ++#define QPHY_V6_N4_PCS_EQ_CONFIG1 0x1dc ++#define QPHY_V6_N4_PCS_EQ_CONFIG2 0x1e0 ++#define QPHY_V6_N4_PCS_EQ_CONFIG5 0x1ec ++ ++#endif +-- +2.43.0 + diff --git a/queue-6.9/phy-qcom-qmp-qserdes-txrx-add-missing-registers-offs.patch b/queue-6.9/phy-qcom-qmp-qserdes-txrx-add-missing-registers-offs.patch new file mode 100644 index 00000000000..5cbbaf675c2 --- /dev/null +++ b/queue-6.9/phy-qcom-qmp-qserdes-txrx-add-missing-registers-offs.patch @@ -0,0 +1,58 @@ +From d4b7e8b74638fe4be3d8fcbab66f8b2fa557f63f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 10:20:35 +0300 +Subject: phy: qcom-qmp: qserdes-txrx: Add missing registers offsets + +From: Abel Vesa + +[ Upstream commit 5314e84c33e7ad61df5203df540626ac59f9dcd9 ] + +Currently, the x1e80100 uses pure V6 register offsets for DP part of the +combo PHY. This hasn't been an issue because external DP is not yet +enabled on any of the boards yet. But in order to enabled it, all these +new V6 N4 register offsets are needed. So add them. + +Fixes: 762c3565f3c8 ("phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets") +Co-developed-by: Kuogee Hsieh +Signed-off-by: Kuogee Hsieh +Signed-off-by: Abel Vesa +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-1-be8a0b882117@linaro.org +Signed-off-by: Vinod Koul +Signed-off-by: Sasha Levin +--- + .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h +index a814ad11af071..d37cc0d4fd365 100644 +--- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h ++++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h +@@ -6,11 +6,24 @@ + #ifndef QCOM_PHY_QMP_QSERDES_TXRX_V6_N4_H_ + #define QCOM_PHY_QMP_QSERDES_TXRX_V6_N4_H_ + ++#define QSERDES_V6_N4_TX_CLKBUF_ENABLE 0x08 ++#define QSERDES_V6_N4_TX_TX_EMP_POST1_LVL 0x0c ++#define QSERDES_V6_N4_TX_TX_DRV_LVL 0x14 ++#define QSERDES_V6_N4_TX_RESET_TSYNC_EN 0x1c ++#define QSERDES_V6_N4_TX_PRE_STALL_LDO_BOOST_EN 0x20 + #define QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_TX 0x30 + #define QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_RX 0x34 ++#define QSERDES_V6_N4_TX_TRANSCEIVER_BIAS_EN 0x48 ++#define QSERDES_V6_N4_TX_HIGHZ_DRVR_EN 0x4c ++#define QSERDES_V6_N4_TX_TX_POL_INV 0x50 ++#define QSERDES_V6_N4_TX_PARRATE_REC_DETECT_IDLE_EN 0x54 + #define QSERDES_V6_N4_TX_LANE_MODE_1 0x78 + #define QSERDES_V6_N4_TX_LANE_MODE_2 0x7c + #define QSERDES_V6_N4_TX_LANE_MODE_3 0x80 ++#define QSERDES_V6_N4_TX_TRAN_DRVR_EMP_EN 0xac ++#define QSERDES_V6_N4_TX_TX_BAND 0xd8 ++#define QSERDES_V6_N4_TX_INTERFACE_SELECT 0xe4 ++#define QSERDES_V6_N4_TX_VMODE_CTRL1 0xb0 + + #define QSERDES_V6_N4_RX_UCDR_FO_GAIN_RATE2 0x8 + #define QSERDES_V6_N4_RX_UCDR_SO_GAIN_RATE2 0x18 +-- +2.43.0 + diff --git a/queue-6.9/powerpc-crypto-add-generated-p8-asm-to-.gitignore.patch b/queue-6.9/powerpc-crypto-add-generated-p8-asm-to-.gitignore.patch new file mode 100644 index 00000000000..0176aff9024 --- /dev/null +++ b/queue-6.9/powerpc-crypto-add-generated-p8-asm-to-.gitignore.patch @@ -0,0 +1,36 @@ +From ed489150683211a2a3442bc3f40444681c7690f2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 08:01:03 -0500 +Subject: powerpc/crypto: Add generated P8 asm to .gitignore + +From: Nathan Lynch + +[ Upstream commit 2b85b7fb1376481f7d4c2cf92e5da942f06b2547 ] + +Looks like drivers/crypto/vmx/.gitignore should have been merged into +arch/powerpc/crypto/.gitignore as part of commit +109303336a0c ("crypto: vmx - Move to arch/powerpc/crypto") so that all +generated asm files are ignored. + +Signed-off-by: Nathan Lynch +Fixes: 109303336a0c ("crypto: vmx - Move to arch/powerpc/crypto") +Signed-off-by: Michael Ellerman +Link: https://msgid.link/20240603-powerpc-crypto-ignore-p8-asm-v1-1-05843fec2bb7@linux.ibm.com +Signed-off-by: Sasha Levin +--- + arch/powerpc/crypto/.gitignore | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/powerpc/crypto/.gitignore b/arch/powerpc/crypto/.gitignore +index e1094f08f713a..e9fe73aac8b61 100644 +--- a/arch/powerpc/crypto/.gitignore ++++ b/arch/powerpc/crypto/.gitignore +@@ -1,3 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0-only + aesp10-ppc.S ++aesp8-ppc.S + ghashp10-ppc.S ++ghashp8-ppc.S +-- +2.43.0 + diff --git a/queue-6.9/rdma-bnxt_re-fix-the-max-msix-vectors-macro.patch b/queue-6.9/rdma-bnxt_re-fix-the-max-msix-vectors-macro.patch new file mode 100644 index 00000000000..d2637189a6a --- /dev/null +++ b/queue-6.9/rdma-bnxt_re-fix-the-max-msix-vectors-macro.patch @@ -0,0 +1,49 @@ +From 6267036a51defc639186f33952ac96bb22e19e12 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 01:56:58 -0700 +Subject: RDMA/bnxt_re: Fix the max msix vectors macro + +From: Selvin Xavier + +[ Upstream commit 056620da899527c14cf36e5019a0decaf4cf0f79 ] + +bnxt_re no longer decide the number of MSI-x vectors used by itself. +Its decided by bnxt_en now. So when bnxt_en changes this value, system +crash is seen. + +Depend on the max value reported by bnxt_en instead of using the its own macros. + +Fixes: 303432211324 ("bnxt_en: Remove runtime interrupt vector allocation") +Signed-off-by: Selvin Xavier +Link: https://lore.kernel.org/r/1716195418-11767-1-git-send-email-selvin.xavier@broadcom.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/bnxt_re/bnxt_re.h | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/infiniband/hw/bnxt_re/bnxt_re.h b/drivers/infiniband/hw/bnxt_re/bnxt_re.h +index 9dca451ed5221..6974922e5609a 100644 +--- a/drivers/infiniband/hw/bnxt_re/bnxt_re.h ++++ b/drivers/infiniband/hw/bnxt_re/bnxt_re.h +@@ -107,8 +107,6 @@ struct bnxt_re_gsi_context { + struct bnxt_re_sqp_entries *sqp_tbl; + }; + +-#define BNXT_RE_MIN_MSIX 2 +-#define BNXT_RE_MAX_MSIX 9 + #define BNXT_RE_AEQ_IDX 0 + #define BNXT_RE_NQ_IDX 1 + #define BNXT_RE_GEN_P5_MAX_VF 64 +@@ -168,7 +166,7 @@ struct bnxt_re_dev { + struct bnxt_qplib_rcfw rcfw; + + /* NQ */ +- struct bnxt_qplib_nq nq[BNXT_RE_MAX_MSIX]; ++ struct bnxt_qplib_nq nq[BNXT_MAX_ROCE_MSIX]; + + /* Device Resources */ + struct bnxt_qplib_dev_attr dev_attr; +-- +2.43.0 + diff --git a/queue-6.9/rdma-mana_ib-ignore-optional-access-flags-for-mrs.patch b/queue-6.9/rdma-mana_ib-ignore-optional-access-flags-for-mrs.patch new file mode 100644 index 00000000000..af9f2f99784 --- /dev/null +++ b/queue-6.9/rdma-mana_ib-ignore-optional-access-flags-for-mrs.patch @@ -0,0 +1,35 @@ +From e5cc1444d95429ff86ed01e76cf92a086d5fe9f3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jun 2024 01:16:08 -0700 +Subject: RDMA/mana_ib: Ignore optional access flags for MRs + +From: Konstantin Taranov + +[ Upstream commit 82a5cc783d49b86afd2f60e297ecd85223c39f88 ] + +Ignore optional ib_access_flags when an MR is created. + +Fixes: 0266a177631d ("RDMA/mana_ib: Add a driver for Microsoft Azure Network Adapter") +Signed-off-by: Konstantin Taranov +Link: https://lore.kernel.org/r/1717575368-14879-1-git-send-email-kotaranov@linux.microsoft.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mana/mr.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/infiniband/hw/mana/mr.c b/drivers/infiniband/hw/mana/mr.c +index b70b13484f097..13a49d8fd49d5 100644 +--- a/drivers/infiniband/hw/mana/mr.c ++++ b/drivers/infiniband/hw/mana/mr.c +@@ -112,6 +112,7 @@ struct ib_mr *mana_ib_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 length, + "start 0x%llx, iova 0x%llx length 0x%llx access_flags 0x%x", + start, iova, length, access_flags); + ++ access_flags &= ~IB_ACCESS_OPTIONAL; + if (access_flags & ~VALID_MR_FLAGS) + return ERR_PTR(-EINVAL); + +-- +2.43.0 + diff --git a/queue-6.9/rdma-mlx5-add-check-for-srq-max_sge-attribute.patch b/queue-6.9/rdma-mlx5-add-check-for-srq-max_sge-attribute.patch new file mode 100644 index 00000000000..dfd103c02f0 --- /dev/null +++ b/queue-6.9/rdma-mlx5-add-check-for-srq-max_sge-attribute.patch @@ -0,0 +1,55 @@ +From 744893f87d05081a0819d5947e0265d6a807d243 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 15:52:56 +0300 +Subject: RDMA/mlx5: Add check for srq max_sge attribute + +From: Patrisious Haddad + +[ Upstream commit 36ab7ada64caf08f10ee5a114d39964d1f91e81d ] + +max_sge attribute is passed by the user, and is inserted and used +unchecked, so verify that the value doesn't exceed maximum allowed value +before using it. + +Fixes: e126ba97dba9 ("mlx5: Add driver for Mellanox Connect-IB adapters") +Signed-off-by: Patrisious Haddad +Link: https://lore.kernel.org/r/277ccc29e8d57bfd53ddeb2ac633f2760cf8cdd0.1716900410.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mlx5/srq.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/drivers/infiniband/hw/mlx5/srq.c b/drivers/infiniband/hw/mlx5/srq.c +index a056ea835da54..84be0c3d56995 100644 +--- a/drivers/infiniband/hw/mlx5/srq.c ++++ b/drivers/infiniband/hw/mlx5/srq.c +@@ -199,17 +199,20 @@ int mlx5_ib_create_srq(struct ib_srq *ib_srq, + int err; + struct mlx5_srq_attr in = {}; + __u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); ++ __u32 max_sge_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq) / ++ sizeof(struct mlx5_wqe_data_seg); + + if (init_attr->srq_type != IB_SRQT_BASIC && + init_attr->srq_type != IB_SRQT_XRC && + init_attr->srq_type != IB_SRQT_TM) + return -EOPNOTSUPP; + +- /* Sanity check SRQ size before proceeding */ +- if (init_attr->attr.max_wr >= max_srq_wqes) { +- mlx5_ib_dbg(dev, "max_wr %d, cap %d\n", +- init_attr->attr.max_wr, +- max_srq_wqes); ++ /* Sanity check SRQ and sge size before proceeding */ ++ if (init_attr->attr.max_wr >= max_srq_wqes || ++ init_attr->attr.max_sge > max_sge_sz) { ++ mlx5_ib_dbg(dev, "max_wr %d,wr_cap %d,max_sge %d, sge_cap:%d\n", ++ init_attr->attr.max_wr, max_srq_wqes, ++ init_attr->attr.max_sge, max_sge_sz); + return -EINVAL; + } + +-- +2.43.0 + diff --git a/queue-6.9/rdma-mlx5-fix-unwind-flow-as-part-of-mlx5_ib_stage_i.patch b/queue-6.9/rdma-mlx5-fix-unwind-flow-as-part-of-mlx5_ib_stage_i.patch new file mode 100644 index 00000000000..1dea6dc05da --- /dev/null +++ b/queue-6.9/rdma-mlx5-fix-unwind-flow-as-part-of-mlx5_ib_stage_i.patch @@ -0,0 +1,42 @@ +From 499fbd42290e5cd8afddbcf15bb333e1b412fdfd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 15:52:55 +0300 +Subject: RDMA/mlx5: Fix unwind flow as part of mlx5_ib_stage_init_init + +From: Yishai Hadas + +[ Upstream commit 81497c148b7a2e4a4fbda93aee585439f7323e2e ] + +Fix unwind flow as part of mlx5_ib_stage_init_init to use the correct +goto upon an error. + +Fixes: 758ce14aee82 ("RDMA/mlx5: Implement MACsec gid addition and deletion") +Signed-off-by: Yishai Hadas +Reviewed-by: Patrisious Haddad +Link: https://lore.kernel.org/r/aa40615116eda14ec9eca21d52017d632ea89188.1716900410.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mlx5/main.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c +index c2b557e642906..9fb8a544236d7 100644 +--- a/drivers/infiniband/hw/mlx5/main.c ++++ b/drivers/infiniband/hw/mlx5/main.c +@@ -3760,10 +3760,10 @@ static int mlx5_ib_stage_init_init(struct mlx5_ib_dev *dev) + spin_lock_init(&dev->dm.lock); + dev->dm.dev = mdev; + return 0; +-err: +- mlx5r_macsec_dealloc_gids(dev); + err_mp: + mlx5_ib_cleanup_multiport_master(dev); ++err: ++ mlx5r_macsec_dealloc_gids(dev); + return err; + } + +-- +2.43.0 + diff --git a/queue-6.9/rdma-rxe-fix-responder-length-checking-for-ud-reques.patch b/queue-6.9/rdma-rxe-fix-responder-length-checking-for-ud-reques.patch new file mode 100644 index 00000000000..515f8170ab0 --- /dev/null +++ b/queue-6.9/rdma-rxe-fix-responder-length-checking-for-ud-reques.patch @@ -0,0 +1,60 @@ +From 32607fca03885644c2ae3e62b45d3ccbb608c814 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 23 May 2024 17:46:17 +0800 +Subject: RDMA/rxe: Fix responder length checking for UD request packets + +From: Honggang LI + +[ Upstream commit f67ac0061c7614c1548963d3ef1ee1606efd8636 ] + +According to the IBA specification: +If a UD request packet is detected with an invalid length, the request +shall be an invalid request and it shall be silently dropped by +the responder. The responder then waits for a new request packet. + +commit 689c5421bfe0 ("RDMA/rxe: Fix incorrect responder length checking") +defers responder length check for UD QPs in function `copy_data`. +But it introduces a regression issue for UD QPs. + +When the packet size is too large to fit in the receive buffer. +`copy_data` will return error code -EINVAL. Then `send_data_in` +will return RESPST_ERR_MALFORMED_WQE. UD QP will transfer into +ERROR state. + +Fixes: 689c5421bfe0 ("RDMA/rxe: Fix incorrect responder length checking") +Signed-off-by: Honggang LI +Link: https://lore.kernel.org/r/20240523094617.141148-1-honggangli@163.com +Reviewed-by: Zhu Yanjun +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/sw/rxe/rxe_resp.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/infiniband/sw/rxe/rxe_resp.c b/drivers/infiniband/sw/rxe/rxe_resp.c +index 963382f625d71..fa2b87c749292 100644 +--- a/drivers/infiniband/sw/rxe/rxe_resp.c ++++ b/drivers/infiniband/sw/rxe/rxe_resp.c +@@ -354,6 +354,19 @@ static enum resp_states rxe_resp_check_length(struct rxe_qp *qp, + * receive buffer later. For rmda operations additional + * length checks are performed in check_rkey. + */ ++ if ((qp_type(qp) == IB_QPT_GSI) || (qp_type(qp) == IB_QPT_UD)) { ++ unsigned int payload = payload_size(pkt); ++ unsigned int recv_buffer_len = 0; ++ int i; ++ ++ for (i = 0; i < qp->resp.wqe->dma.num_sge; i++) ++ recv_buffer_len += qp->resp.wqe->dma.sge[i].length; ++ if (payload + 40 > recv_buffer_len) { ++ rxe_dbg_qp(qp, "The receive buffer is too small for this UD packet.\n"); ++ return RESPST_ERR_LENGTH; ++ } ++ } ++ + if (pkt->mask & RXE_PAYLOAD_MASK && ((qp_type(qp) == IB_QPT_RC) || + (qp_type(qp) == IB_QPT_UC))) { + unsigned int mtu = qp->mtu; +-- +2.43.0 + diff --git a/queue-6.9/regulator-bd71815-fix-ramp-values.patch b/queue-6.9/regulator-bd71815-fix-ramp-values.patch new file mode 100644 index 00000000000..1021ca9b791 --- /dev/null +++ b/queue-6.9/regulator-bd71815-fix-ramp-values.patch @@ -0,0 +1,40 @@ +From 2b75805f18739c1dbc083eabb5ccfda389d31333 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 14:42:34 +0300 +Subject: regulator: bd71815: fix ramp values + +From: Kalle Niemi + +[ Upstream commit 4cac29b846f38d5f0654cdfff5c5bfc37305081c ] + +Ramp values are inverted. This caused wrong values written to register +when ramp values were defined in device tree. + +Invert values in table to fix this. + +Signed-off-by: Kalle Niemi +Fixes: 1aad39001e85 ("regulator: Support ROHM BD71815 regulators") +Reviewed-by: Matti Vaittinen +Link: https://lore.kernel.org/r/ZmmJXtuVJU6RgQAH@latitude5580 +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/regulator/bd71815-regulator.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/regulator/bd71815-regulator.c b/drivers/regulator/bd71815-regulator.c +index 26192d55a6858..79fbb45297f6b 100644 +--- a/drivers/regulator/bd71815-regulator.c ++++ b/drivers/regulator/bd71815-regulator.c +@@ -256,7 +256,7 @@ static int buck12_set_hw_dvs_levels(struct device_node *np, + * 10: 2.50mV/usec 10mV 4uS + * 11: 1.25mV/usec 10mV 8uS + */ +-static const unsigned int bd7181x_ramp_table[] = { 1250, 2500, 5000, 10000 }; ++static const unsigned int bd7181x_ramp_table[] = { 10000, 5000, 2500, 1250 }; + + static int bd7181x_led_set_current_limit(struct regulator_dev *rdev, + int min_uA, int max_uA) +-- +2.43.0 + diff --git a/queue-6.9/regulator-core-fix-modpost-error-regulator_get_regma.patch b/queue-6.9/regulator-core-fix-modpost-error-regulator_get_regma.patch new file mode 100644 index 00000000000..b502ae9005e --- /dev/null +++ b/queue-6.9/regulator-core-fix-modpost-error-regulator_get_regma.patch @@ -0,0 +1,38 @@ +From 4005ae08487b7a451dc58f0093fcab56409b74fb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jun 2024 20:55:32 +0100 +Subject: regulator: core: Fix modpost error "regulator_get_regmap" undefined + +From: Biju Das + +[ Upstream commit 3f60497c658d2072714d097a177612d34b34aa3d ] + +Fix the modpost error "regulator_get_regmap" undefined by adding export +symbol. + +Fixes: 04eca28cde52 ("regulator: Add helpers for low-level register access") +Reported-by: kernel test robot +Closes: https://lore.kernel.org/oe-kbuild-all/202406110117.mk5UR3VZ-lkp@intel.com +Signed-off-by: Biju Das +Link: https://lore.kernel.org/r/20240610195532.175942-1-biju.das.jz@bp.renesas.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/regulator/core.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c +index 2c33653ffdea3..51ff3f9eafd0e 100644 +--- a/drivers/regulator/core.c ++++ b/drivers/regulator/core.c +@@ -3347,6 +3347,7 @@ struct regmap *regulator_get_regmap(struct regulator *regulator) + + return map ? map : ERR_PTR(-EOPNOTSUPP); + } ++EXPORT_SYMBOL_GPL(regulator_get_regmap); + + /** + * regulator_get_hardware_vsel_register - get the HW voltage selector register +-- +2.43.0 + diff --git a/queue-6.9/series b/queue-6.9/series index 6346b54b8a1..42175a598c0 100644 --- a/queue-6.9/series +++ b/queue-6.9/series @@ -141,3 +141,40 @@ netfilter-move-the-sysctl-nf_hooks_lwtunnel-into-the.patch ice-fix-vsi-list-rule-with-ice_sw_lkup_last-type.patch bnxt_en-restore-ptp-tx_avail-count-in-case-of-skb_pa.patch net-usb-rtl8150-fix-unintiatilzed-variables-in-rtl81.patch +rdma-bnxt_re-fix-the-max-msix-vectors-macro.patch +arm64-dts-freescale-imx8mm-verdin-fix-gpu-speed.patch +phy-qcom-qmp-qserdes-txrx-add-missing-registers-offs.patch +phy-qcom-qmp-pcs-add-missing-v6-n4-register-offsets.patch +phy-qcom-qmp-combo-switch-from-v6-to-v6-n4-register-.patch +powerpc-crypto-add-generated-p8-asm-to-.gitignore.patch +spi-cs42l43-correct-spi-root-clock-speed.patch +rdma-rxe-fix-responder-length-checking-for-ud-reques.patch +regulator-core-fix-modpost-error-regulator_get_regma.patch +dmaengine-idxd-fix-possible-use-after-free-in-irq_pr.patch +dmaengine-ti-k3-udma-glue-fix-of_k3_udma_glue_parse_.patch +dmaengine-ioatdma-fix-leaking-on-version-mismatch.patch +dmaengine-ioatdma-fix-error-path-in-ioat3_dma_probe.patch +dmaengine-ioatdma-fix-kmemleak-in-ioat_pci_probe.patch +dmaengine-fsl-edma-avoid-linking-both-modules.patch +dmaengine-ioatdma-fix-missing-kmem_cache_destroy.patch +regulator-bd71815-fix-ramp-values.patch +thermal-drivers-mediatek-lvts_thermal-return-error-i.patch +arm64-dts-imx8mp-fix-tc9595-input-clock-on-dh-i.mx8m.patch +arm-dts-imx53-qsb-hdmi-disable-panel-instead-of-dele.patch +arm64-dts-freescale-imx8mp-venice-gw73xx-2x-fix-bt-s.patch +arm64-dts-imx93-11x11-evk-remove-the-no-sdio-propert.patch +arm64-dts-freescale-imx8mm-verdin-enable-hysteresis-.patch +nfsd-fix-oops-when-reading-pool_stats-before-server-.patch +acpica-revert-acpica-avoid-info-mapping-multiple-bar.patch +acpi-scan-ignore-camera-graph-port-nodes-on-all-dell.patch +kvm-stop-processing-all-memslots-when-null-mmu_notif.patch +spi-fix-spi-slave-probe-failure.patch +x86-resctrl-don-t-try-to-free-nonexistent-rmids.patch +spi-spi-imx-imx51-revert-burst-length-calculation-ba.patch +drm-xe-vf-don-t-touch-guc-irq-registers-if-using-mem.patch +io_uring-rsrc-fix-incorrect-assignment-of-iter-nr_se.patch +firmware-psci-fix-return-value-from-psci_system_susp.patch +loongarch-only-allow-objtool-orc-unwinder-if-toolcha.patch +rdma-mlx5-fix-unwind-flow-as-part-of-mlx5_ib_stage_i.patch +rdma-mlx5-add-check-for-srq-max_sge-attribute.patch +rdma-mana_ib-ignore-optional-access-flags-for-mrs.patch diff --git a/queue-6.9/spi-cs42l43-correct-spi-root-clock-speed.patch b/queue-6.9/spi-cs42l43-correct-spi-root-clock-speed.patch new file mode 100644 index 00000000000..c63680ad83a --- /dev/null +++ b/queue-6.9/spi-cs42l43-correct-spi-root-clock-speed.patch @@ -0,0 +1,39 @@ +From 07b46d530e9f918a2ca289eccca61b8938ad4083 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 14:17:04 +0100 +Subject: spi: cs42l43: Correct SPI root clock speed + +From: Charles Keepax + +[ Upstream commit 4eecb644b8b82f5279a348f6ebe77e3d6e5b1b05 ] + +The root clock is actually 49.152MHz not 40MHz, as it is derived from +the primary audio clock, update the driver to match. This error can +cause the actual clock rate to be higher than the requested clock rate +on the SPI bus. + +Fixes: ef75e767167a ("spi: cs42l43: Add SPI controller support") +Signed-off-by: Charles Keepax +Link: https://msgid.link/r/20240604131704.3227500-1-ckeepax@opensource.cirrus.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/spi-cs42l43.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/spi/spi-cs42l43.c b/drivers/spi/spi-cs42l43.c +index aabef9fc84bdf..0d9c948e119af 100644 +--- a/drivers/spi/spi-cs42l43.c ++++ b/drivers/spi/spi-cs42l43.c +@@ -21,7 +21,7 @@ + #include + + #define CS42L43_FIFO_SIZE 16 +-#define CS42L43_SPI_ROOT_HZ (40 * HZ_PER_MHZ) ++#define CS42L43_SPI_ROOT_HZ 49152000 + #define CS42L43_SPI_MAX_LENGTH 65532 + + enum cs42l43_spi_cmd { +-- +2.43.0 + diff --git a/queue-6.9/spi-fix-spi-slave-probe-failure.patch b/queue-6.9/spi-fix-spi-slave-probe-failure.patch new file mode 100644 index 00000000000..334b7d9d4d1 --- /dev/null +++ b/queue-6.9/spi-fix-spi-slave-probe-failure.patch @@ -0,0 +1,50 @@ +From 3828fc6031ecf6a48b1ae02372b5092eb58bf922 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 21:00:52 +0530 +Subject: spi: Fix SPI slave probe failure + +From: Amit Kumar Mahapatra + +[ Upstream commit 2c1b7bbe253986619fa5623a13055316e730e746 ] + +While adding a SPI device, the SPI core ensures that multiple logical CS +doesn't map to the same physical CS. For example, spi->chip_select[0] != +spi->chip_select[1] and so forth. However, unlike the SPI master, the SPI +slave doesn't have the list of chip selects, this leads to probe failure +when the SPI controller is configured as slave. Update the +__spi_add_device() function to perform this check only if the SPI +controller is configured as master. + +Fixes: 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") +Signed-off-by: Amit Kumar Mahapatra +Link: https://msgid.link/r/20240617153052.26636-1-amit.kumar-mahapatra@amd.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/spi.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c +index 2cea7aeb10f95..c349d6012625a 100644 +--- a/drivers/spi/spi.c ++++ b/drivers/spi/spi.c +@@ -685,10 +685,12 @@ static int __spi_add_device(struct spi_device *spi) + * Make sure that multiple logical CS doesn't map to the same physical CS. + * For example, spi->chip_select[0] != spi->chip_select[1] and so on. + */ +- for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { +- status = spi_dev_check_cs(dev, spi, idx, spi, idx + 1); +- if (status) +- return status; ++ if (!spi_controller_is_target(ctlr)) { ++ for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { ++ status = spi_dev_check_cs(dev, spi, idx, spi, idx + 1); ++ if (status) ++ return status; ++ } + } + + /* Set the bus ID string */ +-- +2.43.0 + diff --git a/queue-6.9/spi-spi-imx-imx51-revert-burst-length-calculation-ba.patch b/queue-6.9/spi-spi-imx-imx51-revert-burst-length-calculation-ba.patch new file mode 100644 index 00000000000..a44b77cfa06 --- /dev/null +++ b/queue-6.9/spi-spi-imx-imx51-revert-burst-length-calculation-ba.patch @@ -0,0 +1,95 @@ +From 02a27635401653563be87f336ca503533c9d657c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jun 2024 19:34:18 +0200 +Subject: spi: spi-imx: imx51: revert burst length calculation back to + bits_per_word + +From: Marc Kleine-Budde + +[ Upstream commit df75470b317b46affbe1f5f8f006b34175be9789 ] + +The patch 15a6af94a277 ("spi: Increase imx51 ecspi burst length based +on transfer length") increased the burst length calculation in +mx51_ecspi_prepare_transfer() to be based on the transfer length. + +This breaks HW CS + SPI_CS_WORD support which was added in +6e95b23a5b2d ("spi: imx: Implement support for CS_WORD") and transfers +with bits-per-word != 8, 16, 32. + +SPI_CS_WORD means the CS should be toggled after each word. The +implementation in the imx-spi driver relies on the fact that the HW CS +is toggled automatically by the controller after each burst length +number of bits. Setting the burst length to the number of bits of the +_whole_ message breaks this use case. + +Further the patch 15a6af94a277 ("spi: Increase imx51 ecspi burst +length based on transfer length") claims to optimize the transfers. +But even without this patch, on modern spi-imx controllers with +"dynamic_burst = true" (imx51, imx6 and newer), the transfers are +already optimized, i.e. the burst length is dynamically adjusted in +spi_imx_push() to avoid the pause between the SPI bursts. This has +been confirmed by a scope measurement on an imx6d. + +Subsequent Patches tried to fix these and other problems: + +- 5f66db08cbd3 ("spi: imx: Take in account bits per word instead of assuming 8-bits") +- e9b220aeacf1 ("spi: spi-imx: correctly configure burst length when using dma") +- c712c05e46c8 ("spi: imx: fix the burst length at DMA mode and CPU mode") +- cf6d79a0f576 ("spi: spi-imx: fix off-by-one in mx51 CPU mode burst length") + +but the HW CS + SPI_CS_WORD use case is still broken. + +To fix the problems revert the burst size calculation in +mx51_ecspi_prepare_transfer() back to the original form, before +15a6af94a277 ("spi: Increase imx51 ecspi burst length based on +transfer length") was applied. + +Cc: Stefan Moring +Cc: Stefan Bigler +Cc: Clark Wang +Cc: Carlos Song +Cc: Sebastian Reichel +Cc: Thorsten Scherer +Fixes: 15a6af94a277 ("spi: Increase imx51 ecspi burst length based on transfer length") +Fixes: 5f66db08cbd3 ("spi: imx: Take in account bits per word instead of assuming 8-bits") +Fixes: e9b220aeacf1 ("spi: spi-imx: correctly configure burst length when using dma") +Fixes: c712c05e46c8 ("spi: imx: fix the burst length at DMA mode and CPU mode") +Fixes: cf6d79a0f576 ("spi: spi-imx: fix off-by-one in mx51 CPU mode burst length") +Link: https://lore.kernel.org/all/20240618-oxpecker-of-ideal-mastery-db59f8-mkl@pengutronix.de +Signed-off-by: Marc Kleine-Budde +Tested-by: Thorsten Scherer +Link: https://msgid.link/r/20240618-spi-imx-fix-bustlength-v1-1-2053dd5fdf87@pengutronix.de +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/spi-imx.c | 14 ++------------ + 1 file changed, 2 insertions(+), 12 deletions(-) + +diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c +index c3e5cee18bea7..09b6c1b45f1a1 100644 +--- a/drivers/spi/spi-imx.c ++++ b/drivers/spi/spi-imx.c +@@ -660,18 +660,8 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, + ctrl |= (spi_imx->target_burst * 8 - 1) + << MX51_ECSPI_CTRL_BL_OFFSET; + else { +- if (spi_imx->usedma) { +- ctrl |= (spi_imx->bits_per_word - 1) +- << MX51_ECSPI_CTRL_BL_OFFSET; +- } else { +- if (spi_imx->count >= MX51_ECSPI_CTRL_MAX_BURST) +- ctrl |= (MX51_ECSPI_CTRL_MAX_BURST * BITS_PER_BYTE - 1) +- << MX51_ECSPI_CTRL_BL_OFFSET; +- else +- ctrl |= (spi_imx->count / DIV_ROUND_UP(spi_imx->bits_per_word, +- BITS_PER_BYTE) * spi_imx->bits_per_word - 1) +- << MX51_ECSPI_CTRL_BL_OFFSET; +- } ++ ctrl |= (spi_imx->bits_per_word - 1) ++ << MX51_ECSPI_CTRL_BL_OFFSET; + } + + /* set clock speed */ +-- +2.43.0 + diff --git a/queue-6.9/thermal-drivers-mediatek-lvts_thermal-return-error-i.patch b/queue-6.9/thermal-drivers-mediatek-lvts_thermal-return-error-i.patch new file mode 100644 index 00000000000..8280822f1de --- /dev/null +++ b/queue-6.9/thermal-drivers-mediatek-lvts_thermal-return-error-i.patch @@ -0,0 +1,45 @@ +From f312299af6207393c84ae1959cd2513b441263ad Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 18:46:58 +0200 +Subject: thermal/drivers/mediatek/lvts_thermal: Return error in case of + invalid efuse data + +From: Julien Panis + +[ Upstream commit 72cacd06e47d86d89b0e7179fbc9eb3a0f39cd93 ] + +This patch prevents from registering thermal entries and letting the +driver misbehave if efuse data is invalid. A device is not properly +calibrated if the golden temperature is zero. + +Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") +Signed-off-by: Julien Panis +Reviewed-by: Nicolas Pitre +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20240604-mtk-thermal-calib-check-v2-1-8f258254051d@baylibre.com +Signed-off-by: Daniel Lezcano +Signed-off-by: Sasha Levin +--- + drivers/thermal/mediatek/lvts_thermal.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c +index 4e5c213a89225..6b9422bd8795d 100644 +--- a/drivers/thermal/mediatek/lvts_thermal.c ++++ b/drivers/thermal/mediatek/lvts_thermal.c +@@ -740,7 +740,11 @@ static int lvts_golden_temp_init(struct device *dev, u32 *value, int temp_offset + + gt = (*value) >> 24; + +- if (gt && gt < LVTS_GOLDEN_TEMP_MAX) ++ /* A zero value for gt means that device has invalid efuse data */ ++ if (!gt) ++ return -ENODATA; ++ ++ if (gt < LVTS_GOLDEN_TEMP_MAX) + golden_temp = gt; + + golden_temp_offset = golden_temp * 500 + temp_offset; +-- +2.43.0 + diff --git a/queue-6.9/x86-resctrl-don-t-try-to-free-nonexistent-rmids.patch b/queue-6.9/x86-resctrl-don-t-try-to-free-nonexistent-rmids.patch new file mode 100644 index 00000000000..61a693f2626 --- /dev/null +++ b/queue-6.9/x86-resctrl-don-t-try-to-free-nonexistent-rmids.patch @@ -0,0 +1,72 @@ +From 3e827a7b296e41b6a494636e396951b4111cb005 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jun 2024 15:01:52 +0100 +Subject: x86/resctrl: Don't try to free nonexistent RMIDs + +From: Dave Martin + +[ Upstream commit 739c9765793e5794578a64aab293c58607f1826a ] + +Commit + + 6791e0ea3071 ("x86/resctrl: Access per-rmid structures by index") + +adds logic to map individual monitoring groups into a global index space used +for tracking allocated RMIDs. + +Attempts to free the default RMID are ignored in free_rmid(), and this works +fine on x86. + +With arm64 MPAM, there is a latent bug here however: on platforms with no +monitors exposed through resctrl, each control group still gets a different +monitoring group ID as seen by the hardware, since the CLOSID always forms part +of the monitoring group ID. + +This means that when removing a control group, the code may try to free this +group's default monitoring group RMID for real. If there are no monitors +however, the RMID tracking table rmid_ptrs[] would be a waste of memory and is +never allocated, leading to a splat when free_rmid() tries to dereference the +table. + +One option would be to treat RMID 0 as special for every CLOSID, but this would +be ugly since bookkeeping still needs to be done for these monitoring group IDs +when there are monitors present in the hardware. + +Instead, add a gating check of resctrl_arch_mon_capable() in free_rmid(), and +just do nothing if the hardware doesn't have monitors. + +This fix mirrors the gating checks already present in +mkdir_rdt_prepare_rmid_alloc() and elsewhere. + +No functional change on x86. + + [ bp: Massage commit message. ] + +Fixes: 6791e0ea3071 ("x86/resctrl: Access per-rmid structures by index") +Signed-off-by: Dave Martin +Signed-off-by: Borislav Petkov (AMD) +Reviewed-by: Reinette Chatre +Tested-by: Reinette Chatre +Link: https://lore.kernel.org/r/20240618140152.83154-1-Dave.Martin@arm.com +Signed-off-by: Sasha Levin +--- + arch/x86/kernel/cpu/resctrl/monitor.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c +index c34a35ec0f031..2ce5f4913c820 100644 +--- a/arch/x86/kernel/cpu/resctrl/monitor.c ++++ b/arch/x86/kernel/cpu/resctrl/monitor.c +@@ -508,7 +508,8 @@ void free_rmid(u32 closid, u32 rmid) + * allows architectures that ignore the closid parameter to avoid an + * unnecessary check. + */ +- if (idx == resctrl_arch_rmid_idx_encode(RESCTRL_RESERVED_CLOSID, ++ if (!resctrl_arch_mon_capable() || ++ idx == resctrl_arch_rmid_idx_encode(RESCTRL_RESERVED_CLOSID, + RESCTRL_RESERVED_RMID)) + return; + +-- +2.43.0 + -- 2.47.3