From c5dbcd94fc78d67b6c0a7e55615ae2019300956f Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 7 Jul 2025 16:35:32 +0100 Subject: [PATCH] arm64: dts: renesas: r9a09g077: Add SDHI nodes Add the SDHI0-SDHI1 nodes to the RZ/T2H ("R9A09G077") SoC DTSI. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250707153533.287832-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi index 0583a26ecbc4e..b16fd9259d8de 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -155,6 +155,46 @@ interrupt-controller; interrupts = ; }; + + sdhi0: mmc@92080000 { + compatible = "renesas,sdhi-r9a09g077", + "renesas,sdhi-r9a09g057"; + reg = <0x0 0x92080000 0 0x10000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 1212>, + <&cpg CPG_CORE R9A09G077_SDHI_CLKHS>; + clock-names = "aclk", "clkh"; + power-domains = <&cpg>; + status = "disabled"; + + sdhi0_vqmmc: vqmmc-regulator { + regulator-name = "SDHI0-VQMMC"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + status = "disabled"; + }; + }; + + sdhi1: mmc@92090000 { + compatible = "renesas,sdhi-r9a09g077", + "renesas,sdhi-r9a09g057"; + reg = <0x0 0x92090000 0 0x10000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 1213>, + <&cpg CPG_CORE R9A09G077_SDHI_CLKHS>; + clock-names = "aclk", "clkh"; + power-domains = <&cpg>; + status = "disabled"; + + sdhi1_vqmmc: vqmmc-regulator { + regulator-name = "SDHI1-VQMMC"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + status = "disabled"; + }; + }; }; timer { -- 2.47.3