From c93ec4bf87d97df5dd8039b4e19acb9c4b0b0977 Mon Sep 17 00:00:00 2001 From: Brian Hill Date: Wed, 16 Jun 2010 10:26:16 -0600 Subject: [PATCH] Add A9 timer support. --- board/xilinx/common/xstatus.h | 489 ++++++++++++++++----------- board/xilinx/dfe/xstatus.h | 377 --------------------- cpu/arm_cortexa8/pele/config.mk | 2 + cpu/arm_cortexa8/pele/timer.c | 68 ++-- cpu/arm_cortexa8/pele/xscutimer_hw.h | 117 +++++++ include/configs/xpele.h | 5 +- 6 files changed, 451 insertions(+), 607 deletions(-) delete mode 100644 board/xilinx/dfe/xstatus.h create mode 100644 cpu/arm_cortexa8/pele/xscutimer_hw.h diff --git a/board/xilinx/common/xstatus.h b/board/xilinx/common/xstatus.h index ffda4d7d4df..6808afc5c9b 100644 --- a/board/xilinx/common/xstatus.h +++ b/board/xilinx/common/xstatus.h @@ -1,39 +1,42 @@ +/* $Id: xstatus.h,v 1.1.2.1 2010/01/07 06:11:50 sadanan Exp $ */ /****************************************************************************** * -* Author: Xilinx, Inc. +* (c) Copyright 2002-2009 Xilinx, Inc. All rights reserved. * +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. * -* This program is free software; you can redistribute it and/or modify it -* under the terms of the GNU General Public License as published by the -* Free Software Foundation; either version 2 of the License, or (at your -* option) any later version. +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. * +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. * -* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A -* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS -* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, -* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE -* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING -* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. -* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO -* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY -* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM -* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND -* FITNESS FOR A PARTICULAR PURPOSE. -* -* -* Xilinx hardware products are not intended for use in life support -* appliances, devices, or systems. Use in such applications is -* expressly prohibited. -* -* -* (c) Copyright 2002-2004 Xilinx Inc. -* All rights reserved. -* -* -* You should have received a copy of the GNU General Public License along -* with this program; if not, write to the Free Software Foundation, Inc., -* 675 Mass Ave, Cambridge, MA 02139, USA. +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. * ******************************************************************************/ /*****************************************************************************/ @@ -42,7 +45,7 @@ * @file xstatus.h * * This file contains Xilinx software status codes. Status codes have their -* own data type called XStatus. These codes are used throughout the Xilinx +* own data type called int. These codes are used throughout the Xilinx * device drivers. * ******************************************************************************/ @@ -50,298 +53,376 @@ #ifndef XSTATUS_H /* prevent circular inclusions */ #define XSTATUS_H /* by using protection macros */ +#ifdef __cplusplus +extern "C" { +#endif + /***************************** Include Files *********************************/ +#ifdef NOTNOW +#include "xil_types.h" +#include "xil_assert.h" +#else #include "xbasic_types.h" +#endif /************************** Constant Definitions *****************************/ /*********************** Common statuses 0 - 500 *****************************/ -#define XST_SUCCESS 0L -#define XST_FAILURE 1L -#define XST_DEVICE_NOT_FOUND 2L -#define XST_DEVICE_BLOCK_NOT_FOUND 3L -#define XST_INVALID_VERSION 4L -#define XST_DEVICE_IS_STARTED 5L -#define XST_DEVICE_IS_STOPPED 6L -#define XST_FIFO_ERROR 7L /* an error occurred during an +#define XST_SUCCESS 0L +#define XST_FAILURE 1L +#define XST_DEVICE_NOT_FOUND 2L +#define XST_DEVICE_BLOCK_NOT_FOUND 3L +#define XST_INVALID_VERSION 4L +#define XST_DEVICE_IS_STARTED 5L +#define XST_DEVICE_IS_STOPPED 6L +#define XST_FIFO_ERROR 7L /* an error occurred during an operation with a FIFO such as an underrun or overrun, this error requires the device to be reset */ -#define XST_RESET_ERROR 8L /* an error occurred which requires - the device to be reset */ -#define XST_DMA_ERROR 9L /* a DMA error occurred, this error - typically requires the device - using the DMA to be reset */ -#define XST_NOT_POLLED 10L /* the device is not configured for - polled mode operation */ -#define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to put - the specified data into */ -#define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large enough - to hold the expected data */ -#define XST_NO_DATA 13L /* there was no data available */ -#define XST_REGISTER_ERROR 14L /* a register did not contain the - expected value */ -#define XST_INVALID_PARAM 15L /* an invalid parameter was passed - into the function */ -#define XST_NOT_SGDMA 16L /* the device is not configured for - scatter-gather DMA operation */ -#define XST_LOOPBACK_ERROR 17L /* a loopback test failed */ -#define XST_NO_CALLBACK 18L /* a callback has not yet been - * registered */ -#define XST_NO_FEATURE 19L /* device is not configured with - * the requested feature */ -#define XST_NOT_INTERRUPT 20L /* device is not configured for - * interrupt mode operation */ -#define XST_DEVICE_BUSY 21L /* device is busy */ -#define XST_ERROR_COUNT_MAX 22L /* the error counters of a device - * have maxed out */ -#define XST_IS_STARTED 23L /* used when part of device is - * already started i.e. - * sub channel */ -#define XST_IS_STOPPED 24L /* used when part of device is - * already stopped i.e. - * sub channel */ +#define XST_RESET_ERROR 8L /* an error occurred which + requires the device to be + reset */ +#define XST_DMA_ERROR 9L /* a DMA error occurred, this + error typically requires the + device using the DMA to be + reset */ +#define XST_NOT_POLLED 10L /* the device is not configured + for polled mode operation */ +#define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to + put the specified data into + */ +#define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large + enough to hold the expected + data */ +#define XST_NO_DATA 13L /* there was no data available + */ +#define XST_REGISTER_ERROR 14L /* a register did not contain + the expected value */ +#define XST_INVALID_PARAM 15L /* an invalid parameter was + passed into the function */ +#define XST_NOT_SGDMA 16L /* the device is not configured + for scatter-gather DMA + operation */ +#define XST_LOOPBACK_ERROR 17L /* a loopback test failed */ +#define XST_NO_CALLBACK 18L /* a callback has not yet been + registered */ +#define XST_NO_FEATURE 19L /* device is not configured with + the requested feature */ +#define XST_NOT_INTERRUPT 20L /* device is not configured for + interrupt mode operation */ +#define XST_DEVICE_BUSY 21L /* device is busy */ +#define XST_ERROR_COUNT_MAX 22L /* the error counters of a + device have maxed out */ +#define XST_IS_STARTED 23L /* used when part of device is + already started i.e. + sub channel */ +#define XST_IS_STOPPED 24L /* used when part of device is + already stopped i.e. + sub channel */ +#define XST_DATA_LOST 26L /* driver defined error */ +#define XST_RECV_ERROR 27L /* generic receive error */ +#define XST_SEND_ERROR 28L /* generic transmit error */ +#define XST_NOT_ENABLED 29L /* a requested service is not + available because it has not + been enabled */ /***************** Utility Component statuses 401 - 500 *********************/ -#define XST_MEMTEST_FAILED 401L /* memory test failed */ +#define XST_MEMTEST_FAILED 401L /* memory test failed */ /***************** Common Components statuses 501 - 1000 *********************/ /********************* Packet Fifo statuses 501 - 510 ************************/ -#define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */ -#define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */ -#define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value +#define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */ +#define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */ +#define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value was invalid after reset */ +#define XST_PFIFO_ERROR 504L /* generic packet FIFO error */ +#define XST_PFIFO_DEADLOCK 505L /* packet FIFO is reporting + * empty and full simultaneously + */ /************************** DMA statuses 511 - 530 ***************************/ -#define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer +#define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer failed */ -#define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value +#define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value was invalid after reset */ -#define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains +#define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains no buffer descriptors ready to be processed */ -#define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */ -#define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */ -#define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of +#define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */ +#define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */ +#define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of the scatter gather list are being used */ -#define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer +#define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer descriptor which is to be copied over in the scatter list is locked */ -#define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have been - put into the scatter gather - list to be commited */ -#define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold +#define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have + been put into the scatter + gather list to be commited */ +#define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold specified was larger than the total # of buffer descriptors in the scatter gather list */ -#define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has +#define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has already been created */ -#define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has +#define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has been created */ -#define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which was - being started was not committed - to the list */ -#define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to start - has already been used by the - hardware so it can't be reused - */ +#define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which + was being started was not + committed to the list */ +#define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to + start has already been used + by the hardware so it can't + be reused */ +#define XST_DMA_SG_LIST_ERROR 526L /* general purpose list access + error */ +#define XST_DMA_BD_ERROR 527L /* general buffer descriptor + error */ /************************** IPIF statuses 531 - 550 ***************************/ -#define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width +#define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width was passed into the function */ -#define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at +#define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at reset was not valid */ -#define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device interrupt +#define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device intr status register did not read back correctly */ -#define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status +#define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status register did not reset when acked */ -#define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable +#define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable register was not updated when other registers changed */ -#define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt +#define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt status register did not read back correctly */ -#define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status register - did not reset when acked */ -#define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register was - not updated correctly when other - registers changed */ -#define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending +#define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status + register did not reset when + acked */ +#define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register + was not updated correctly + when other registers changed + */ +#define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending + register did not indicate the + expected value */ +#define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register did not indicate the expected value */ -#define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register - did not indicate the expected - value */ +#define XST_IPIF_ERROR 541L /* generic ipif error */ /****************** Device specific statuses 1001 - 4095 *********************/ /********************* Ethernet statuses 1001 - 1050 *************************/ -#define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big enough - * to hold the minimum number of - * buffers or descriptors */ -#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */ -#define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */ -#define XST_EMAC_MII_BUSY 1004L /* An MII operation is in progress */ -#define XST_EMAC_OUT_OF_BUFFERS 1005L /* Adapter is out of buffers */ -#define XST_EMAC_PARSE_ERROR 1006L /* Invalid adapter init string */ -#define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late +#define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big + * enough to hold the minimum + * number of buffers or + * descriptors */ +#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */ +#define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */ +#define XST_EMAC_MII_BUSY 1004L /* An MII operation is in + * progress */ +#define XST_EMAC_OUT_OF_BUFFERS 1005L /* Driver is out of buffers */ +#define XST_EMAC_PARSE_ERROR 1006L /* Invalid driver init string */ +#define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late * collision on polled send */ /*********************** UART statuses 1051 - 1075 ***************************/ #define XST_UART -#define XST_UART_INIT_ERROR 1051L -#define XST_UART_START_ERROR 1052L -#define XST_UART_CONFIG_ERROR 1053L -#define XST_UART_TEST_FAIL 1054L -#define XST_UART_BAUD_ERROR 1055L -#define XST_UART_BAUD_RANGE 1056L +#define XST_UART_INIT_ERROR 1051L +#define XST_UART_START_ERROR 1052L +#define XST_UART_CONFIG_ERROR 1053L +#define XST_UART_TEST_FAIL 1054L +#define XST_UART_BAUD_ERROR 1055L +#define XST_UART_BAUD_RANGE 1056L /************************ IIC statuses 1076 - 1100 ***************************/ -#define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */ -#define XST_IIC_BUS_BUSY 1077 /* bus found busy */ -#define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with */ - /* general call address */ -#define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg */ - /* value after reset not valid */ -#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design */ - /* value after reset not valid */ -#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design */ - /* value after reset not valid */ -#define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design */ - /* value after reset not valid */ -#define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register */ - /* didn't return value written */ -#define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg */ - /* didn't return value written */ -#define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg */ - /* didn't return value written */ -#define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg */ - /* didn't return value written */ -#define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg */ - /* didn't return written value */ -#define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */ +#define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */ +#define XST_IIC_BUS_BUSY 1077 /* bus found busy */ +#define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with + * general call address */ +#define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg + * value after reset not valid + */ +#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design + * value after reset not valid + */ +#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design + * value after reset not valid + */ +#define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design + * value after reset not valid + */ +#define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register + * didn't return value written + */ +#define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg + * didn't return value written + */ +#define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg + * didn't return value written + */ +#define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg + * didn't return value written + */ +#define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg + * didn't return written value + */ +#define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */ /*********************** ATMC statuses 1101 - 1125 ***************************/ -#define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM +#define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM controller hit the max value which requires the statistics to be cleared */ /*********************** Flash statuses 1126 - 1150 **************************/ -#define XST_FLASH_BUSY 1126L /* Flash is erasing or programming */ -#define XST_FLASH_READY 1127L /* Flash is ready for commands */ -#define XST_FLASH_ERROR 1128L /* Flash had detected an internal - error. Use XFlash_DeviceControl +#define XST_FLASH_BUSY 1126L /* Flash is erasing or + programming */ +#define XST_FLASH_READY 1127L /* Flash is ready for commands + */ +#define XST_FLASH_ERROR 1128L /* Flash had detected an + internal error. Use + XFlash_DeviceControl to retrieve device specific codes */ -#define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase state */ -#define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write state */ -#define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by +#define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase + state */ +#define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write + state */ +#define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by driver */ -#define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */ -#define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */ -#define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase operation - aborted due to a timeout */ -#define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its +#define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */ +#define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */ +#define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase + operation aborted due to a + timeout */ +#define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its addressible range */ -#define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */ -#define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately from - write/erase function with - XFL_NON_BLOCKING_WRITE/ERASE - option cleared */ -#define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */ +#define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */ +#define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately + from write/erase function + with XFL_NON_BLOCKING_WRITE/ + ERASE option cleared */ +#define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */ /*********************** SPI statuses 1151 - 1175 ****************************/ -#define XST_SPI_MODE_FAULT 1151 /* master was selected as slave */ -#define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */ -#define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit register */ -#define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive register */ -#define XST_SPI_NO_SLAVE 1155 /* no slave has been selected yet */ -#define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being +#define XST_SPI_MODE_FAULT 1151 /* master was selected as slave + */ +#define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */ +#define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit + * register */ +#define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive + * register */ +#define XST_SPI_NO_SLAVE 1155 /* no slave has been selected + * yet */ +#define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being * selected */ -#define XST_SPI_NOT_MASTER 1157 /* operation is valid only as master */ -#define XST_SPI_SLAVE_ONLY 1158 /* device is configured as slave-only */ -#define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while disabled */ +#define XST_SPI_NOT_MASTER 1157 /* operation is valid only as + * master */ +#define XST_SPI_SLAVE_ONLY 1158 /* device is configured as + * slave-only */ +#define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while + * disabled */ /********************** OPB Arbiter statuses 1176 - 1200 *********************/ -#define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have either - * one master assigned to two or more - * priorities, or one master not - * assigned to any priority +#define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have + either one master assigned to + * two or more priorities, or + * one master not assigned + * to any priority */ -#define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify the - * priority levels without first - * suspending the use of priority - * levels +#define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify + * the priority levels without + * first suspending the use of + * priority levels */ -#define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled but - * bus parking was not enabled - */ -#define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed +#define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled + * but bus parking was not + * enabled */ +#define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed * priority mode to allow the * priorities to be changed */ /************************ Intc statuses 1201 - 1225 **************************/ -#define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */ -#define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */ +#define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */ +#define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */ /********************** TmrCtr statuses 1226 - 1250 **************************/ -#define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */ +#define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */ /********************** WdtTb statuses 1251 - 1275 ***************************/ -#define XST_WDTTB_TIMER_FAILED 1251L +#define XST_WDTTB_TIMER_FAILED 1251L /********************** PlbArb statuses 1276 - 1300 **************************/ -#define XST_PLBARB_FAIL_SELFTEST 1276L +#define XST_PLBARB_FAIL_SELFTEST 1276L /********************** Plb2Opb statuses 1301 - 1325 *************************/ -#define XST_PLB2OPB_FAIL_SELFTEST 1301L +#define XST_PLB2OPB_FAIL_SELFTEST 1301L /********************** Opb2Plb statuses 1326 - 1350 *************************/ -#define XST_OPB2PLB_FAIL_SELFTEST 1326L +#define XST_OPB2PLB_FAIL_SELFTEST 1326L /********************** SysAce statuses 1351 - 1360 **************************/ -#define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted */ +#define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted + */ /********************** PCI Bridge statuses 1361 - 1375 **********************/ -#define XST_PCI_INVALID_ADDRESS 1361L +#define XST_PCI_INVALID_ADDRESS 1361L + +/********************** FlexRay constants 1400 - 1409 *************************/ + +#define XST_FR_TX_ERROR 1400 +#define XST_FR_TX_BUSY 1401 +#define XST_FR_BUF_LOCKED 1402 +#define XST_FR_NO_BUF 1403 + +/****************** USB constants 1410 - 1420 *******************************/ + +#define XST_USB_ALREADY_CONFIGURED 1410 +#define XST_USB_BUF_ALIGN_ERROR 1411 +#define XST_USB_NO_DESC_AVAILABLE 1412 +#define XST_USB_BUF_TOO_BIG 1413 +#define XST_USB_NO_BUF 1414 + +/****************** HWICAP constants 1421 - 1430 *****************************/ + +#define XST_HWICAP_WRITE_DONE 1421 /**************************** Type Definitions *******************************/ -/** - * The status typedef. - */ -typedef u32 XStatus; +typedef int XStatus; /***************** Macros (Inline Functions) Definitions *********************/ /************************** Function Prototypes ******************************/ -#endif /* end of protection macro */ +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ diff --git a/board/xilinx/dfe/xstatus.h b/board/xilinx/dfe/xstatus.h deleted file mode 100644 index 2a8d5b7e6b6..00000000000 --- a/board/xilinx/dfe/xstatus.h +++ /dev/null @@ -1,377 +0,0 @@ -/* $Id: xstatus.h,v 1.1.2.1 2009/05/19 14:56:56 meinelte Exp $ */ -/****************************************************************************** -* -* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" -* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND -* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, -* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, -* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION -* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, -* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE -* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY -* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE -* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR -* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF -* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE. -* -* (c) Copyright 2002-2007 Xilinx Inc. -* All rights reserved. -* -******************************************************************************/ -/*****************************************************************************/ -/** -* -* @file xstatus.h -* -* This file contains Xilinx software status codes. Status codes have their -* own data type called int. These codes are used throughout the Xilinx -* device drivers. -* -******************************************************************************/ - -#ifndef XSTATUS_H /* prevent circular inclusions */ -#define XSTATUS_H /* by using protection macros */ - -#ifdef __cplusplus -extern "C" { -#endif - -/***************************** Include Files *********************************/ - -#include "xbasic_types.h" - -/************************** Constant Definitions *****************************/ - -/*********************** Common statuses 0 - 500 *****************************/ - -#define XST_SUCCESS 0L -#define XST_FAILURE 1L -#define XST_DEVICE_NOT_FOUND 2L -#define XST_DEVICE_BLOCK_NOT_FOUND 3L -#define XST_INVALID_VERSION 4L -#define XST_DEVICE_IS_STARTED 5L -#define XST_DEVICE_IS_STOPPED 6L -#define XST_FIFO_ERROR 7L /* an error occurred during an - operation with a FIFO such as - an underrun or overrun, this - error requires the device to - be reset */ -#define XST_RESET_ERROR 8L /* an error occurred which requires - the device to be reset */ -#define XST_DMA_ERROR 9L /* a DMA error occurred, this error - typically requires the device - using the DMA to be reset */ -#define XST_NOT_POLLED 10L /* the device is not configured for - polled mode operation */ -#define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to put - the specified data into */ -#define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large enough - to hold the expected data */ -#define XST_NO_DATA 13L /* there was no data available */ -#define XST_REGISTER_ERROR 14L /* a register did not contain the - expected value */ -#define XST_INVALID_PARAM 15L /* an invalid parameter was passed - into the function */ -#define XST_NOT_SGDMA 16L /* the device is not configured for - scatter-gather DMA operation */ -#define XST_LOOPBACK_ERROR 17L /* a loopback test failed */ -#define XST_NO_CALLBACK 18L /* a callback has not yet been - registered */ -#define XST_NO_FEATURE 19L /* device is not configured with - the requested feature */ -#define XST_NOT_INTERRUPT 20L /* device is not configured for - interrupt mode operation */ -#define XST_DEVICE_BUSY 21L /* device is busy */ -#define XST_ERROR_COUNT_MAX 22L /* the error counters of a device - have maxed out */ -#define XST_IS_STARTED 23L /* used when part of device is - already started i.e. - sub channel */ -#define XST_IS_STOPPED 24L /* used when part of device is - already stopped i.e. - sub channel */ -#define XST_DATA_LOST 26L /* driver defined error */ -#define XST_RECV_ERROR 27L /* generic receive error */ -#define XST_SEND_ERROR 28L /* generic transmit error */ -#define XST_NOT_ENABLED 29L /* a requested service is not - available because it has not - been enabled */ - -/***************** Utility Component statuses 401 - 500 *********************/ - -#define XST_MEMTEST_FAILED 401L /* memory test failed */ - - -/***************** Common Components statuses 501 - 1000 *********************/ - -/********************* Packet Fifo statuses 501 - 510 ************************/ - -#define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */ -#define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */ -#define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value - was invalid after reset */ -#define XST_PFIFO_ERROR 504L /* generic packet FIFO error */ -#define XST_PFIFO_DEADLOCK 505L /* packet FIFO is reporting - * empty and full simultaneously - */ - -/************************** DMA statuses 511 - 530 ***************************/ - -#define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer - failed */ -#define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value - was invalid after reset */ -#define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains - no buffer descriptors ready - to be processed */ -#define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */ -#define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */ -#define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of - the scatter gather list are - being used */ -#define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer - descriptor which is to be - copied over in the scatter - list is locked */ -#define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have been - put into the scatter gather - list to be commited */ -#define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold - specified was larger than the - total # of buffer descriptors - in the scatter gather list */ -#define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has - already been created */ -#define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has - been created */ -#define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which was - being started was not committed - to the list */ -#define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to start - has already been used by the - hardware so it can't be reused - */ -#define XST_DMA_SG_LIST_ERROR 526L /* general purpose list access - error */ -#define XST_DMA_BD_ERROR 527L /* general buffer descriptor - error */ - -/************************** IPIF statuses 531 - 550 ***************************/ - -#define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width - was passed into the function */ -#define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at - reset was not valid */ -#define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device interrupt - status register did not read - back correctly */ -#define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status - register did not reset when - acked */ -#define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable - register was not updated when - other registers changed */ -#define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt - status register did not read - back correctly */ -#define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status register - did not reset when acked */ -#define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register was - not updated correctly when other - registers changed */ -#define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending - register did not indicate the - expected value */ -#define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register - did not indicate the expected - value */ -#define XST_IPIF_ERROR 541L /* generic ipif error */ - -/****************** Device specific statuses 1001 - 4095 *********************/ - -/********************* Ethernet statuses 1001 - 1050 *************************/ - -#define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big enough - * to hold the minimum number of - * buffers or descriptors */ -#define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */ -#define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */ -#define XST_EMAC_MII_BUSY 1004L /* An MII operation is in progress */ -#define XST_EMAC_OUT_OF_BUFFERS 1005L /* Driver is out of buffers */ -#define XST_EMAC_PARSE_ERROR 1006L /* Invalid driver init string */ -#define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late - * collision on polled send */ - -/*********************** UART statuses 1051 - 1075 ***************************/ -#define XST_UART - -#define XST_UART_INIT_ERROR 1051L -#define XST_UART_START_ERROR 1052L -#define XST_UART_CONFIG_ERROR 1053L -#define XST_UART_TEST_FAIL 1054L -#define XST_UART_BAUD_ERROR 1055L -#define XST_UART_BAUD_RANGE 1056L - - -/************************ IIC statuses 1076 - 1100 ***************************/ - -#define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */ -#define XST_IIC_BUS_BUSY 1077 /* bus found busy */ -#define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with */ - /* general call address */ -#define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg */ - /* value after reset not valid */ -#define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design */ - /* value after reset not valid */ -#define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design */ - /* value after reset not valid */ -#define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design */ - /* value after reset not valid */ -#define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register */ - /* didn't return value written */ -#define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg */ - /* didn't return value written */ -#define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg */ - /* didn't return value written */ -#define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg */ - /* didn't return value written */ -#define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg */ - /* didn't return written value */ -#define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */ - -/*********************** ATMC statuses 1101 - 1125 ***************************/ - -#define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM - controller hit the max value - which requires the statistics - to be cleared */ - -/*********************** Flash statuses 1126 - 1150 **************************/ - -#define XST_FLASH_BUSY 1126L /* Flash is erasing or programming - */ -#define XST_FLASH_READY 1127L /* Flash is ready for commands */ -#define XST_FLASH_ERROR 1128L /* Flash had detected an internal - error. Use XFlash_DeviceControl - to retrieve device specific codes - */ -#define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase state - */ -#define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write state - */ -#define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by - driver */ -#define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */ -#define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */ -#define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase operation - aborted due to a timeout */ -#define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its - addressible range */ -#define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */ -#define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately from - write/erase function with - XFL_NON_BLOCKING_WRITE/ERASE - option cleared */ -#define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */ - -/*********************** SPI statuses 1151 - 1175 ****************************/ - -#define XST_SPI_MODE_FAULT 1151 /* master was selected as slave */ -#define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */ -#define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit register */ -#define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive register */ -#define XST_SPI_NO_SLAVE 1155 /* no slave has been selected yet */ -#define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being - * selected */ -#define XST_SPI_NOT_MASTER 1157 /* operation is valid only as master */ -#define XST_SPI_SLAVE_ONLY 1158 /* device is configured as slave-only - */ -#define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while disabled */ - -/********************** OPB Arbiter statuses 1176 - 1200 *********************/ - -#define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have either - * one master assigned to two or more - * priorities, or one master not - * assigned to any priority - */ -#define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify the - * priority levels without first - * suspending the use of priority - * levels - */ -#define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled but - * bus parking was not enabled - */ -#define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed - * priority mode to allow the - * priorities to be changed - */ - -/************************ Intc statuses 1201 - 1225 **************************/ - -#define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */ -#define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */ - -/********************** TmrCtr statuses 1226 - 1250 **************************/ - -#define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */ - -/********************** WdtTb statuses 1251 - 1275 ***************************/ - -#define XST_WDTTB_TIMER_FAILED 1251L - -/********************** PlbArb statuses 1276 - 1300 **************************/ - -#define XST_PLBARB_FAIL_SELFTEST 1276L - -/********************** Plb2Opb statuses 1301 - 1325 *************************/ - -#define XST_PLB2OPB_FAIL_SELFTEST 1301L - -/********************** Opb2Plb statuses 1326 - 1350 *************************/ - -#define XST_OPB2PLB_FAIL_SELFTEST 1326L - -/********************** SysAce statuses 1351 - 1360 **************************/ - -#define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted */ - -/********************** PCI Bridge statuses 1361 - 1375 **********************/ - -#define XST_PCI_INVALID_ADDRESS 1361L - -/********************** FlexRay constants 1400 - 1409 *************************/ - -#define XST_FR_TX_ERROR 1400 -#define XST_FR_TX_BUSY 1401 -#define XST_FR_BUF_LOCKED 1402 -#define XST_FR_NO_BUF 1403 - -/****************** USB constants 1410 - 1420 *******************************/ - -#define XST_USB_ALREADY_CONFIGURED 1410 -#define XST_USB_BUF_ALIGN_ERROR 1411 -#define XST_USB_NO_DESC_AVAILABLE 1412 -#define XST_USB_BUF_TOO_BIG 1413 -#define XST_USB_NO_BUF 1414 - -/****************** HWICAP constants 1421 - 1430 *****************************/ - -#define XST_HWICAP_WRITE_DONE 1421 - -/**************************** Type Definitions *******************************/ - -typedef int XStatus; - -/***************** Macros (Inline Functions) Definitions *********************/ - - -/************************** Function Prototypes ******************************/ - -#ifdef __cplusplus -} -#endif - -#endif /* end of protection macro */ diff --git a/cpu/arm_cortexa8/pele/config.mk b/cpu/arm_cortexa8/pele/config.mk index 1c1ec229a37..541c73df6b3 100644 --- a/cpu/arm_cortexa8/pele/config.mk +++ b/cpu/arm_cortexa8/pele/config.mk @@ -24,6 +24,8 @@ PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ -msoft-float PLATFORM_CPPFLAGS += -march=armv7-a +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/xilinx/common +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR) # ========================================================================= # diff --git a/cpu/arm_cortexa8/pele/timer.c b/cpu/arm_cortexa8/pele/timer.c index 0348c6fb928..48433b524bf 100644 --- a/cpu/arm_cortexa8/pele/timer.c +++ b/cpu/arm_cortexa8/pele/timer.c @@ -44,17 +44,10 @@ #include #include -static ulong timer_load_val; +#include "xparameters.h" +#include "xscutimer_hw.h" -#define PRESCALER 167 - -/* read the 16 bit timer */ -static inline ulong read_timer(void) -{ -#ifdef NOTNOW_BHILL - return xdfttc_readl(COUNT_VALUE); -#endif -} +#define TIMER_LOAD_VAL 0xFFFFFFFF /* Internal tick units */ /* Last decremneter snapshot */ @@ -62,22 +55,47 @@ static unsigned long lastdec; /* Monotonic incrementing timer */ static unsigned long long timestamp; -int timer_init() +static void XScuTimer_WriteReg (u32 Reg, u32 Data) { - reset_timer_masked(); + *(volatile u32 *) (XPAR_SCUTIMER_BASEADDR + Reg) = Data; } -#ifdef NOTNOW_BHILL +static u32 XScuTimer_ReadReg (u32 Reg) +{ + return *(u32 *) (XPAR_SCUTIMER_BASEADDR + Reg); +} -int interrupt_init(void) +#define XScuTimer_GetCounterValue() \ + XScuTimer_ReadReg(XSCUTIMER_COUNTER_OFFSET) + + +int timer_init() { - /* complete garbage. */ - timer_load_val = 0x800000; - lastdec = 0x100; + u32 val; + + /* + * Load the timer counter register. + */ + XScuTimer_WriteReg(XSCUTIMER_LOAD_OFFSET, 0xFFFFFFFF); + + /* + * Start the A9Timer device. + */ + val = XScuTimer_ReadReg(XSCUTIMER_CONTROL_OFFSET); + /* Enable Auto reload mode. */ + val |= XSCUTIMER_CONTROL_AUTO_RELOAD_MASK; + /* Clear prescaler control bits */ + val &= ~XSCUTIMER_CONTROL_PRESCALER_MASK; + /* Set prescaler value */ + val |= (0xFF << XSCUTIMER_CONTROL_PRESCALER_SHIFT); + /* Enable the decrementer */ + val |= XSCUTIMER_CONTROL_ENABLE_MASK; + XScuTimer_WriteReg(XSCUTIMER_CONTROL_OFFSET, val); + + reset_timer_masked(); return 0; } -#endif /* * timer without interrupts @@ -89,14 +107,16 @@ int interrupt_init(void) */ unsigned long long get_ticks(void) { - ulong now = read_timer(); + ulong now; + + now = XScuTimer_GetCounterValue(); if (lastdec >= now) { /* normal mode */ timestamp += lastdec - now; } else { /* we have an overflow ... */ - timestamp += lastdec + timer_load_val - now; + timestamp += lastdec + TIMER_LOAD_VAL - now; } lastdec = now; @@ -110,13 +130,13 @@ unsigned long long get_ticks(void) ulong get_tbclk(void) { /* We overrun in 100s */ - return (ulong)(timer_load_val / 100); + return (ulong)(TIMER_LOAD_VAL / 100); } void reset_timer_masked(void) { /* reset time */ - lastdec = read_timer(); + lastdec = XScuTimer_GetCounterValue(); timestamp = 0; } @@ -128,7 +148,7 @@ void reset_timer(void) ulong get_timer_masked(void) { unsigned long long res = get_ticks(); - do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ))); + do_div (res, (CONFIG_SYS_HZ / 1000000) ); return res; } @@ -139,7 +159,7 @@ ulong get_timer(ulong base) void set_timer(ulong t) { - timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ)); + timestamp = t * (TIMER_LOAD_VAL / (100 * CONFIG_SYS_HZ)); } void udelay(unsigned long usec) diff --git a/cpu/arm_cortexa8/pele/xscutimer_hw.h b/cpu/arm_cortexa8/pele/xscutimer_hw.h new file mode 100644 index 00000000000..13d61185b52 --- /dev/null +++ b/cpu/arm_cortexa8/pele/xscutimer_hw.h @@ -0,0 +1,117 @@ +/* $Id: xscutimer_hw.h,v 1.1.2.1 2010/04/14 11:34:56 naveenm Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/****************************************************************************/ +/** +* +* @file xscutimer_hw.h +* +* This file contains the hardware interface to the Timer. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who Date     Changes
+* ----- --- -------- ---------------------------------------------
+* 1.00a nm  03/10/10 First release
+*
+* +******************************************************************************/ +#ifndef XSCUTIMER_HW_H /* prevent circular inclusions */ +#define XSCUTIMER_HW_H /* by using protection macros */ + +#ifdef __cplusplus +extern "C" { +#endif + +/***************************** Include Files *********************************/ +#ifdef NOTNOW_BHILL +#include "xil_types.h" +#include "xil_io.h" +#endif +/************************** Constant Definitions *****************************/ + +/** @name Register Map + * Offsets of registers from the start of the device + * @{ + */ + +#define XSCUTIMER_LOAD_OFFSET 0x00 /**< Timer Load Register */ +#define XSCUTIMER_COUNTER_OFFSET 0x04 /**< Timer Counter Register */ +#define XSCUTIMER_CONTROL_OFFSET 0x08 /**< Timer Control Register */ +#define XSCUTIMER_ISR_OFFSET 0x0C /**< Timer Interrupt + Status Register */ +/* @} */ + +/** @name Timer Control register + * This register bits control the prescaler, Intr enable, + * auto-reload and timer enable. + * @{ + */ + +#define XSCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /**< Prescaler */ +#define XSCUTIMER_CONTROL_PRESCALER_SHIFT 8 +#define XSCUTIMER_CONTROL_IRQ_ENABLE_MASK 0x00000004 /**< Intr enable */ +#define XSCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /**< Auto-reload */ +#define XSCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /**< Timer enable */ +/* @} */ + +/** @name Interrupt Status register + * This register indicates the Timer counter register has reached zero. + * @{ + */ + +#define XSCUTIMER_ISR_EVENT_FLAG_MASK 0x00000001 /**< Event flag */ +/*@}*/ + +/**************************** Type Definitions *******************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/************************** Function Prototypes ******************************/ + +/************************** Variable Definitions *****************************/ + +#ifdef __cplusplus +} +#endif + +#endif /* end of protection macro */ diff --git a/include/configs/xpele.h b/include/configs/xpele.h index bbeabed48d2..15fc593f93b 100644 --- a/include/configs/xpele.h +++ b/include/configs/xpele.h @@ -119,8 +119,9 @@ #define CONFIG_TTC0 1 #define CONFIG_GEM0 1 -/* Guessing here...no idea what the "multiplier" is supposed to be */ -#define CONFIG_SYS_HZ 50 +/* XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ */ +#define CONFIG_SYS_HZ 12500000 + /* And here... */ #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ /* Semi-educated guess based on p.48 of DF Arch spec */ -- 2.47.3