From cf03071b7c3f1537dba21a64bcd1559b5201a156 Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Mon, 25 Aug 2025 16:26:31 +0200 Subject: [PATCH] clk: amlogic: drop CLK_SET_RATE_PARENT from peripheral clocks On Amlogic SoCs, the rate of a peripheral clock should not be changed, let alone the rate of the parent PLL. These clocks are meant to be used as provided by the parent PLL. Changing the rate would be dangerous and would likely break a lot of devices running from the same PLL. Don't propagate any rate change request that may come from these clocks and drop the corresponding flag. Link: https://lore.kernel.org/r/20250825-meson-clk-cleanup-24-v2-6-0f402f01e117@baylibre.com Signed-off-by: Jerome Brunet --- drivers/clk/meson/meson-clkc-utils.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson-clkc-utils.h b/drivers/clk/meson/meson-clkc-utils.h index 0c228a6723bb..3e1fb7efe6da 100644 --- a/drivers/clk/meson/meson-clkc-utils.h +++ b/drivers/clk/meson/meson-clkc-utils.h @@ -38,7 +38,7 @@ struct clk_regmap _name = { \ .ops = _ops, \ .parent_hws = (const struct clk_hw *[]) { _pname }, \ .num_parents = 1, \ - .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ + .flags = CLK_IGNORE_UNUSED, \ }, \ } -- 2.47.3