From d1581cc6b4c44f4d51ae06f939be5d1da8ba987b Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 3 Jun 2014 13:57:36 -0700 Subject: [PATCH] 3.14-stable patches added patches: drm-i915-break-encoder-crtc-link-separately-in-intel_sanitize_crtc.patch drm-i915-don-t-check-gmch-state-on-inherited-configs.patch drm-i915-don-t-warn-nor-handle-unexpected-hpd-interrupts-on-gmch-platforms.patch drm-radeon-disable-mclk-dpm-on-r7-260x.patch drm-radeon-fix-audio-pin-counts-for-dce6-v2.patch drm-radeon-fix-runpm-handling-on-apus-v4.patch --- ...nk-separately-in-intel_sanitize_crtc.patch | 116 ++++++++++ ...heck-gmch-state-on-inherited-configs.patch | 87 ++++++++ ...ted-hpd-interrupts-on-gmch-platforms.patch | 70 ++++++ ...m-radeon-disable-mclk-dpm-on-r7-260x.patch | 36 +++ ...eon-fix-audio-pin-counts-for-dce6-v2.patch | 71 ++++++ ...radeon-fix-runpm-handling-on-apus-v4.patch | 207 ++++++++++++++++++ queue-3.14/series | 6 + 7 files changed, 593 insertions(+) create mode 100644 queue-3.14/drm-i915-break-encoder-crtc-link-separately-in-intel_sanitize_crtc.patch create mode 100644 queue-3.14/drm-i915-don-t-check-gmch-state-on-inherited-configs.patch create mode 100644 queue-3.14/drm-i915-don-t-warn-nor-handle-unexpected-hpd-interrupts-on-gmch-platforms.patch create mode 100644 queue-3.14/drm-radeon-disable-mclk-dpm-on-r7-260x.patch create mode 100644 queue-3.14/drm-radeon-fix-audio-pin-counts-for-dce6-v2.patch create mode 100644 queue-3.14/drm-radeon-fix-runpm-handling-on-apus-v4.patch diff --git a/queue-3.14/drm-i915-break-encoder-crtc-link-separately-in-intel_sanitize_crtc.patch b/queue-3.14/drm-i915-break-encoder-crtc-link-separately-in-intel_sanitize_crtc.patch new file mode 100644 index 00000000000..280d347974e --- /dev/null +++ b/queue-3.14/drm-i915-break-encoder-crtc-link-separately-in-intel_sanitize_crtc.patch @@ -0,0 +1,116 @@ +From 7f1950fbb989e8fc5463b307e062b4529d51c862 Mon Sep 17 00:00:00 2001 +From: Egbert Eich +Date: Fri, 25 Apr 2014 10:56:22 +0200 +Subject: drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc() + +From: Egbert Eich + +commit 7f1950fbb989e8fc5463b307e062b4529d51c862 upstream. + +Depending on the SDVO output_flags SDVO may have multiple connectors +linking to the same encoder (in intel_connector->encoder->base). +Only one of those connectors should be active (ie link to the encoder +thru drm_connector->encoder). +If intel_connector_break_all_links() is called from intel_sanitize_crtc() +we may break the crtc connection of an encoder thru an inactive connector +in which case intel_connector_break_all_links() will not be called again +for the active connector if this happens to come later in the list due to: + if (connector->encoder->base.crtc != &crtc->base) + continue; +in intel_sanitize_crtc(). +This will however leave the drm_connector->encoder linkage for this +active connector in place. Subsequently this will cause multiple +warnings in intel_connector_check_state() to trigger and the driver +will eventually die in drm_encoder_crtc_ok() (because of crtc == NULL). + +To avoid this remove intel_connector_break_all_links() and move its +code to its two calling functions: intel_sanitize_crtc() and +intel_sanitize_encoder(). +This allows to implement the link breaking more flexibly matching +the surrounding code: ie. in intel_sanitize_crtc() we can break the +crtc link separatly after the links to the encoders have been +broken which avoids above problem. + +This regression has been introduced in: + +commit 24929352481f085c5f85d4d4cbc919ddf106d381 +Author: Daniel Vetter +Date: Mon Jul 2 20:28:59 2012 +0200 + + drm/i915: read out the modeset hw state at load and resume time + +so goes back to the very beginning of the modeset rework. + +v2: This patch takes care of the concernes voiced by Chris Wilson +and Daniel Vetter that only breaking links if the drm_connector +is linked to an encoder may miss some links. +v3: move all encoder handling to encoder loop as suggested by +Daniel Vetter. + +Signed-off-by: Egbert Eich +Reviewed-by: Daniel Vetter +Cc: Jani Nikula +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++------------ + 1 file changed, 14 insertions(+), 12 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -10989,15 +10989,6 @@ void intel_modeset_init(struct drm_devic + intel_disable_fbc(dev); + } + +-static void +-intel_connector_break_all_links(struct intel_connector *connector) +-{ +- connector->base.dpms = DRM_MODE_DPMS_OFF; +- connector->base.encoder = NULL; +- connector->encoder->connectors_active = false; +- connector->encoder->base.crtc = NULL; +-} +- + static void intel_enable_pipe_a(struct drm_device *dev) + { + struct intel_connector *connector; +@@ -11079,8 +11070,17 @@ static void intel_sanitize_crtc(struct i + if (connector->encoder->base.crtc != &crtc->base) + continue; + +- intel_connector_break_all_links(connector); ++ connector->base.dpms = DRM_MODE_DPMS_OFF; ++ connector->base.encoder = NULL; + } ++ /* multiple connectors may have the same encoder: ++ * handle them and break crtc link separately */ ++ list_for_each_entry(connector, &dev->mode_config.connector_list, ++ base.head) ++ if (connector->encoder->base.crtc == &crtc->base) { ++ connector->encoder->base.crtc = NULL; ++ connector->encoder->connectors_active = false; ++ } + + WARN_ON(crtc->active); + crtc->base.enabled = false; +@@ -11151,6 +11151,8 @@ static void intel_sanitize_encoder(struc + drm_get_encoder_name(&encoder->base)); + encoder->disable(encoder); + } ++ encoder->base.crtc = NULL; ++ encoder->connectors_active = false; + + /* Inconsistent output/port/pipe state happens presumably due to + * a bug in one of the get_hw_state functions. Or someplace else +@@ -11161,8 +11163,8 @@ static void intel_sanitize_encoder(struc + base.head) { + if (connector->encoder != encoder) + continue; +- +- intel_connector_break_all_links(connector); ++ connector->base.dpms = DRM_MODE_DPMS_OFF; ++ connector->base.encoder = NULL; + } + } + /* Enabled encoders without active connectors will be fixed in diff --git a/queue-3.14/drm-i915-don-t-check-gmch-state-on-inherited-configs.patch b/queue-3.14/drm-i915-don-t-check-gmch-state-on-inherited-configs.patch new file mode 100644 index 00000000000..886dc31d496 --- /dev/null +++ b/queue-3.14/drm-i915-don-t-check-gmch-state-on-inherited-configs.patch @@ -0,0 +1,87 @@ +From 9953599bc02dbc1d3330e6a0bfc6c50e9dffcac6 Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Sun, 13 Apr 2014 12:00:33 +0200 +Subject: drm/i915: Don't check gmch state on inherited configs + +From: Daniel Vetter + +commit 9953599bc02dbc1d3330e6a0bfc6c50e9dffcac6 upstream. + +... our current modeset code isn't good enough yet to handle this. The +scenario is: + +1. BIOS sets up a cloned config with lvds+external screen on the same +pipe, e.g. pipe B. + +2. We read out that state for pipe B and assign the gmch_pfit state to +it. + +3. The initial modeset switches the lvds to pipe A but due to lack of +atomic modeset we don't recompute the config of pipe B. + +-> both pipes now claim (in the sw pipe config structure) to use the +gmch_pfit, which just won't work. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74081 +Tested-by: max +Cc: Alan Stern +Signed-off-by: Daniel Vetter +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 23 ++++++++++++++++++----- + drivers/gpu/drm/i915/intel_drv.h | 3 ++- + 2 files changed, 20 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -9354,11 +9354,22 @@ intel_pipe_config_compare(struct drm_dev + PIPE_CONF_CHECK_I(pipe_src_w); + PIPE_CONF_CHECK_I(pipe_src_h); + +- PIPE_CONF_CHECK_I(gmch_pfit.control); +- /* pfit ratios are autocomputed by the hw on gen4+ */ +- if (INTEL_INFO(dev)->gen < 4) +- PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); +- PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); ++ /* ++ * FIXME: BIOS likes to set up a cloned config with lvds+external ++ * screen. Since we don't yet re-compute the pipe config when moving ++ * just the lvds port away to another pipe the sw tracking won't match. ++ * ++ * Proper atomic modesets with recomputed global state will fix this. ++ * Until then just don't check gmch state for inherited modes. ++ */ ++ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) { ++ PIPE_CONF_CHECK_I(gmch_pfit.control); ++ /* pfit ratios are autocomputed by the hw on gen4+ */ ++ if (INTEL_INFO(dev)->gen < 4) ++ PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); ++ PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); ++ } ++ + PIPE_CONF_CHECK_I(pch_pfit.enabled); + if (current_config->pch_pfit.enabled) { + PIPE_CONF_CHECK_I(pch_pfit.pos); +@@ -11193,6 +11204,8 @@ static void intel_modeset_readout_hw_sta + base.head) { + memset(&crtc->config, 0, sizeof(crtc->config)); + ++ crtc->config.quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE; ++ + crtc->active = dev_priv->display.get_pipe_config(crtc, + &crtc->config); + +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -219,7 +219,8 @@ struct intel_crtc_config { + * tracked with quirk flags so that fastboot and state checker can act + * accordingly. + */ +-#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ ++#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ ++#define PIPE_CONFIG_QUIRK_INHERITED_MODE (1<<1) /* mode inherited from firmware */ + unsigned long quirks; + + /* User requested mode, only valid as a starting point to diff --git a/queue-3.14/drm-i915-don-t-warn-nor-handle-unexpected-hpd-interrupts-on-gmch-platforms.patch b/queue-3.14/drm-i915-don-t-warn-nor-handle-unexpected-hpd-interrupts-on-gmch-platforms.patch new file mode 100644 index 00000000000..f15aacabb07 --- /dev/null +++ b/queue-3.14/drm-i915-don-t-warn-nor-handle-unexpected-hpd-interrupts-on-gmch-platforms.patch @@ -0,0 +1,70 @@ +From 3ff04a160a891e56cdcee5c198d4c764d1c8c78b Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Thu, 24 Apr 2014 12:03:17 +0200 +Subject: drm/i915: Don't WARN nor handle unexpected hpd interrupts on gmch platforms + +From: Daniel Vetter + +commit 3ff04a160a891e56cdcee5c198d4c764d1c8c78b upstream. + +The status bits are unconditionally set, the control bits only enable +the actual interrupt generation. Which means if we get some random +other interrupts we'll bogusly complain about them. + +So restrict the WARN to platforms with a sane hotplug interrupt +handling scheme. And even more important also don't attempt to process +the hpd bit since we've detected a storm already. Instead just clear +the bit silently. + +This WARN has been introduced in + +commit b8f102e8bf71cacf33326360fdf9dcfd1a63925b +Author: Egbert Eich +Date: Fri Jul 26 14:14:24 2013 +0200 + + drm/i915: Add messages useful for HPD storm detection debugging (v2) + +before that we silently handled the hpd event and so partially +defeated the storm detection. + +v2: Pimp commit message (Jani) + +Cc: Jani Nikula +Cc: Egbert Eich +Cc: bitlord +Reported-by: bitlord +Signed-off-by: Daniel Vetter +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_irq.c | 18 ++++++++++++++---- + 1 file changed, 14 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_irq.c ++++ b/drivers/gpu/drm/i915/i915_irq.c +@@ -1252,10 +1252,20 @@ static inline void intel_hpd_irq_handler + spin_lock(&dev_priv->irq_lock); + for (i = 1; i < HPD_NUM_PINS; i++) { + +- WARN_ONCE(hpd[i] & hotplug_trigger && +- dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED, +- "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", +- hotplug_trigger, i, hpd[i]); ++ if (hpd[i] & hotplug_trigger && ++ dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED) { ++ /* ++ * On GMCH platforms the interrupt mask bits only ++ * prevent irq generation, not the setting of the ++ * hotplug bits itself. So only WARN about unexpected ++ * interrupts on saner platforms. ++ */ ++ WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev), ++ "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", ++ hotplug_trigger, i, hpd[i]); ++ ++ continue; ++ } + + if (!(hpd[i] & hotplug_trigger) || + dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED) diff --git a/queue-3.14/drm-radeon-disable-mclk-dpm-on-r7-260x.patch b/queue-3.14/drm-radeon-disable-mclk-dpm-on-r7-260x.patch new file mode 100644 index 00000000000..452d20f14b7 --- /dev/null +++ b/queue-3.14/drm-radeon-disable-mclk-dpm-on-r7-260x.patch @@ -0,0 +1,36 @@ +From 57700ad1f2f21d5d7ab7ee0e58d11b5954852434 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 10 Apr 2014 22:29:03 -0400 +Subject: drm/radeon: disable mclk dpm on R7 260X + +From: Alex Deucher + +commit 57700ad1f2f21d5d7ab7ee0e58d11b5954852434 upstream. + +Setting higher mclks seems to cause stability issues +on some R7 260X boards. Disable it for now for stability +until we find a proper fix. + +bug: +https://bugs.freedesktop.org/show_bug.cgi?id=75992 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/ci_dpm.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/radeon/ci_dpm.c ++++ b/drivers/gpu/drm/radeon/ci_dpm.c +@@ -5106,6 +5106,10 @@ int ci_dpm_init(struct radeon_device *rd + pi->mclk_dpm_key_disabled = 0; + pi->pcie_dpm_key_disabled = 0; + ++ /* mclk dpm is unstable on some R7 260X cards */ ++ if (rdev->pdev->device == 0x6658) ++ pi->mclk_dpm_key_disabled = 1; ++ + pi->caps_sclk_ds = true; + + pi->mclk_strobe_mode_threshold = 40000; diff --git a/queue-3.14/drm-radeon-fix-audio-pin-counts-for-dce6-v2.patch b/queue-3.14/drm-radeon-fix-audio-pin-counts-for-dce6-v2.patch new file mode 100644 index 00000000000..1bc67f8dc18 --- /dev/null +++ b/queue-3.14/drm-radeon-fix-audio-pin-counts-for-dce6-v2.patch @@ -0,0 +1,71 @@ +From be0949f5eb9c8133a05cf25f108f09e85e79cd32 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 8 Apr 2014 11:28:54 -0400 +Subject: drm/radeon: fix audio pin counts for DCE6+ (v2) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit be0949f5eb9c8133a05cf25f108f09e85e79cd32 upstream. + +There is actually quite a bit of variance based on +the asic. + +v2: fix typo noticed by Jerome. + +Signed-off-by: Alex Deucher +Signed-off-by: Christian König +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/dce6_afmt.c | 14 ++++++++++---- + drivers/gpu/drm/radeon/radeon.h | 5 ++++- + 2 files changed, 14 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/radeon/dce6_afmt.c ++++ b/drivers/gpu/drm/radeon/dce6_afmt.c +@@ -309,11 +309,17 @@ int dce6_audio_init(struct radeon_device + + rdev->audio.enabled = true; + +- if (ASIC_IS_DCE8(rdev)) ++ if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ ++ rdev->audio.num_pins = 7; ++ else if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ ++ rdev->audio.num_pins = 3; ++ else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ ++ rdev->audio.num_pins = 7; ++ else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ + rdev->audio.num_pins = 6; +- else if (ASIC_IS_DCE61(rdev)) +- rdev->audio.num_pins = 4; +- else ++ else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ ++ rdev->audio.num_pins = 2; ++ else /* SI: 6 streams, 6 endpoints */ + rdev->audio.num_pins = 6; + + for (i = 0; i < rdev->audio.num_pins; i++) { +--- a/drivers/gpu/drm/radeon/radeon.h ++++ b/drivers/gpu/drm/radeon/radeon.h +@@ -742,7 +742,7 @@ union radeon_irq_stat_regs { + struct cik_irq_stat_regs cik; + }; + +-#define RADEON_MAX_HPD_PINS 6 ++#define RADEON_MAX_HPD_PINS 7 + #define RADEON_MAX_CRTCS 6 + #define RADEON_MAX_AFMT_BLOCKS 7 + +@@ -2552,6 +2552,9 @@ void r100_pll_errata_after_index(struct + #define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND)) + #define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN)) + #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) ++#define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI)) ++#define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE)) ++#define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI)) + + #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ + (rdev->ddev->pdev->device == 0x6850) || \ diff --git a/queue-3.14/drm-radeon-fix-runpm-handling-on-apus-v4.patch b/queue-3.14/drm-radeon-fix-runpm-handling-on-apus-v4.patch new file mode 100644 index 00000000000..15604b49412 --- /dev/null +++ b/queue-3.14/drm-radeon-fix-runpm-handling-on-apus-v4.patch @@ -0,0 +1,207 @@ +From 90c4cde9d5a2bb6239cb3e253bb3832ed89dc75c Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 10 Apr 2014 22:29:01 -0400 +Subject: drm/radeon: fix runpm handling on APUs (v4) + +From: Alex Deucher + +commit 90c4cde9d5a2bb6239cb3e253bb3832ed89dc75c upstream. + +Don't try and runtime suspend the APU in PX systems. We +only want to power down the dGPU. + +v2: fix harder +v3: fix stupid typo +v4: consolidate runpm enablement to a single flag + +bugs: +https://bugs.freedesktop.org/show_bug.cgi?id=75127 +https://bugzilla.kernel.org/show_bug.cgi?id=72701 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon.h | 1 + + drivers/gpu/drm/radeon/radeon_atpx_handler.c | 2 +- + drivers/gpu/drm/radeon/radeon_device.c | 19 ++++++++++--------- + drivers/gpu/drm/radeon/radeon_drv.c | 24 ++++-------------------- + drivers/gpu/drm/radeon/radeon_family.h | 1 + + drivers/gpu/drm/radeon/radeon_kms.c | 14 ++++++++++---- + 6 files changed, 27 insertions(+), 34 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon.h ++++ b/drivers/gpu/drm/radeon/radeon.h +@@ -2242,6 +2242,7 @@ struct radeon_device { + bool have_disp_power_ref; + }; + ++bool radeon_is_px(struct drm_device *dev); + int radeon_device_init(struct radeon_device *rdev, + struct drm_device *ddev, + struct pci_dev *pdev, +--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c ++++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c +@@ -59,7 +59,7 @@ struct atpx_mux { + u16 mux; + } __packed; + +-bool radeon_is_px(void) { ++bool radeon_has_atpx(void) { + return radeon_atpx_priv.atpx_detected; + } + +--- a/drivers/gpu/drm/radeon/radeon_device.c ++++ b/drivers/gpu/drm/radeon/radeon_device.c +@@ -102,11 +102,14 @@ static const char radeon_family_name[][1 + "LAST", + }; + +-#if defined(CONFIG_VGA_SWITCHEROO) +-bool radeon_is_px(void); +-#else +-static inline bool radeon_is_px(void) { return false; } +-#endif ++bool radeon_is_px(struct drm_device *dev) ++{ ++ struct radeon_device *rdev = dev->dev_private; ++ ++ if (rdev->flags & RADEON_IS_PX) ++ return true; ++ return false; ++} + + /** + * radeon_program_register_sequence - program an array of registers. +@@ -1082,7 +1085,7 @@ static void radeon_switcheroo_set_state( + { + struct drm_device *dev = pci_get_drvdata(pdev); + +- if (radeon_is_px() && state == VGA_SWITCHEROO_OFF) ++ if (radeon_is_px(dev) && state == VGA_SWITCHEROO_OFF) + return; + + if (state == VGA_SWITCHEROO_ON) { +@@ -1303,9 +1306,7 @@ int radeon_device_init(struct radeon_dev + * ignore it */ + vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); + +- if (radeon_runtime_pm == 1) +- runtime = true; +- if ((radeon_runtime_pm == -1) && radeon_is_px()) ++ if (rdev->flags & RADEON_IS_PX) + runtime = true; + vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime); + if (runtime) +--- a/drivers/gpu/drm/radeon/radeon_drv.c ++++ b/drivers/gpu/drm/radeon/radeon_drv.c +@@ -113,6 +113,7 @@ extern int radeon_get_crtc_scanoutpos(st + unsigned int flags, + int *vpos, int *hpos, ktime_t *stime, + ktime_t *etime); ++extern bool radeon_is_px(struct drm_device *dev); + extern const struct drm_ioctl_desc radeon_ioctls_kms[]; + extern int radeon_max_kms_ioctl; + int radeon_mmap(struct file *filp, struct vm_area_struct *vma); +@@ -142,11 +143,9 @@ void radeon_debugfs_cleanup(struct drm_m + #if defined(CONFIG_VGA_SWITCHEROO) + void radeon_register_atpx_handler(void); + void radeon_unregister_atpx_handler(void); +-bool radeon_is_px(void); + #else + static inline void radeon_register_atpx_handler(void) {} + static inline void radeon_unregister_atpx_handler(void) {} +-static inline bool radeon_is_px(void) { return false; } + #endif + + int radeon_no_wb; +@@ -403,12 +402,7 @@ static int radeon_pmops_runtime_suspend( + struct drm_device *drm_dev = pci_get_drvdata(pdev); + int ret; + +- if (radeon_runtime_pm == 0) { +- pm_runtime_forbid(dev); +- return -EBUSY; +- } +- +- if (radeon_runtime_pm == -1 && !radeon_is_px()) { ++ if (!radeon_is_px(drm_dev)) { + pm_runtime_forbid(dev); + return -EBUSY; + } +@@ -432,10 +426,7 @@ static int radeon_pmops_runtime_resume(s + struct drm_device *drm_dev = pci_get_drvdata(pdev); + int ret; + +- if (radeon_runtime_pm == 0) +- return -EINVAL; +- +- if (radeon_runtime_pm == -1 && !radeon_is_px()) ++ if (!radeon_is_px(drm_dev)) + return -EINVAL; + + drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; +@@ -460,14 +451,7 @@ static int radeon_pmops_runtime_idle(str + struct drm_device *drm_dev = pci_get_drvdata(pdev); + struct drm_crtc *crtc; + +- if (radeon_runtime_pm == 0) { +- pm_runtime_forbid(dev); +- return -EBUSY; +- } +- +- /* are we PX enabled? */ +- if (radeon_runtime_pm == -1 && !radeon_is_px()) { +- DRM_DEBUG_DRIVER("failing to power off - not px\n"); ++ if (!radeon_is_px(drm_dev)) { + pm_runtime_forbid(dev); + return -EBUSY; + } +--- a/drivers/gpu/drm/radeon/radeon_family.h ++++ b/drivers/gpu/drm/radeon/radeon_family.h +@@ -115,6 +115,7 @@ enum radeon_chip_flags { + RADEON_NEW_MEMMAP = 0x00400000UL, + RADEON_IS_PCI = 0x00800000UL, + RADEON_IS_IGPGART = 0x01000000UL, ++ RADEON_IS_PX = 0x02000000UL, + }; + + #endif +--- a/drivers/gpu/drm/radeon/radeon_kms.c ++++ b/drivers/gpu/drm/radeon/radeon_kms.c +@@ -35,9 +35,9 @@ + #include + + #if defined(CONFIG_VGA_SWITCHEROO) +-bool radeon_is_px(void); ++bool radeon_has_atpx(void); + #else +-static inline bool radeon_is_px(void) { return false; } ++static inline bool radeon_has_atpx(void) { return false; } + #endif + + /** +@@ -107,6 +107,13 @@ int radeon_driver_load_kms(struct drm_de + flags |= RADEON_IS_PCI; + } + ++ if (radeon_runtime_pm == 1) ++ flags |= RADEON_IS_PX; ++ else if ((radeon_runtime_pm == -1) && ++ radeon_has_atpx() && ++ ((flags & RADEON_IS_IGP) == 0)) ++ flags |= RADEON_IS_PX; ++ + /* radeon_device_init should report only fatal error + * like memory allocation failure or iomapping failure, + * or memory manager initialization failure, it must +@@ -137,8 +144,7 @@ int radeon_driver_load_kms(struct drm_de + "Error during ACPI methods call\n"); + } + +- if ((radeon_runtime_pm == 1) || +- ((radeon_runtime_pm == -1) && radeon_is_px())) { ++ if (radeon_is_px(dev)) { + pm_runtime_use_autosuspend(dev->dev); + pm_runtime_set_autosuspend_delay(dev->dev, 5000); + pm_runtime_set_active(dev->dev); diff --git a/queue-3.14/series b/queue-3.14/series index 90b9b6cd668..3c7a12dd59d 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -60,3 +60,9 @@ irqchip-armada-370-xp-fix-invalid-cast-of-signed-value-into-unsigned-variable.pa irqchip-armada-370-xp-implement-the-check_device-msi_chip-operation.patch irqchip-armada-370-xp-fix-releasing-of-msis.patch drm-i915-allow-user-modes-to-exceed-dvi-165mhz-limit.patch +drm-i915-don-t-check-gmch-state-on-inherited-configs.patch +drm-i915-don-t-warn-nor-handle-unexpected-hpd-interrupts-on-gmch-platforms.patch +drm-i915-break-encoder-crtc-link-separately-in-intel_sanitize_crtc.patch +drm-radeon-fix-audio-pin-counts-for-dce6-v2.patch +drm-radeon-fix-runpm-handling-on-apus-v4.patch +drm-radeon-disable-mclk-dpm-on-r7-260x.patch -- 2.47.3