From d294e4ab22d4e74667b3fa740c63ddbafb3d9fd0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Mon, 10 Nov 2025 19:27:40 +0200 Subject: [PATCH] drm/i915/de: Implement register waits one way MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Currently we use a messy mix of intel_wait_for_register*() and __intel_wait_for_register*() to implement various register polling functions. Make the mess a bit more understandable by always using the __intel_wait_for_register*() stuff. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251110172756.2132-2-ville.syrjala@linux.intel.com Reviewed-by: Suraj Kandpal Acked-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_de.h | 17 +++------- .../drm/xe/compat-i915-headers/intel_uncore.h | 31 ++++++------------- 2 files changed, 14 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index 9ecdcf6b73e4d..ea9973dbbffc8 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -104,15 +104,6 @@ intel_de_rmw(struct intel_display *display, i915_reg_t reg, u32 clear, u32 set) return val; } -static inline int -__intel_de_wait_for_register_nowl(struct intel_display *display, - i915_reg_t reg, - u32 mask, u32 value, unsigned int timeout_ms) -{ - return intel_wait_for_register(__to_uncore(display), reg, mask, - value, timeout_ms); -} - static inline int __intel_de_wait_for_register_atomic_nowl(struct intel_display *display, i915_reg_t reg, @@ -131,8 +122,8 @@ intel_de_wait(struct intel_display *display, i915_reg_t reg, intel_dmc_wl_get(display, reg); - ret = __intel_de_wait_for_register_nowl(display, reg, mask, value, - timeout_ms); + ret = __intel_wait_for_register(__to_uncore(display), reg, mask, + value, 2, timeout_ms, NULL); intel_dmc_wl_put(display, reg); @@ -147,8 +138,8 @@ intel_de_wait_fw(struct intel_display *display, i915_reg_t reg, intel_dmc_wl_get(display, reg); - ret = intel_wait_for_register_fw(__to_uncore(display), reg, mask, - value, timeout_ms, out_value); + ret = __intel_wait_for_register_fw(__to_uncore(display), reg, mask, + value, 2, timeout_ms, out_value); intel_dmc_wl_put(display, reg); diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h index d012f02bc84f7..d93ddacdf743d 100644 --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h @@ -91,27 +91,6 @@ static inline u32 intel_uncore_rmw(struct intel_uncore *uncore, return xe_mmio_rmw32(__compat_uncore_to_mmio(uncore), reg, clear, set); } -static inline int intel_wait_for_register(struct intel_uncore *uncore, - i915_reg_t i915_reg, u32 mask, - u32 value, unsigned int timeout) -{ - struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); - - return xe_mmio_wait32(__compat_uncore_to_mmio(uncore), reg, mask, value, - timeout * USEC_PER_MSEC, NULL, false); -} - -static inline int intel_wait_for_register_fw(struct intel_uncore *uncore, - i915_reg_t i915_reg, u32 mask, - u32 value, unsigned int timeout, - u32 *out_value) -{ - struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); - - return xe_mmio_wait32(__compat_uncore_to_mmio(uncore), reg, mask, value, - timeout * USEC_PER_MSEC, out_value, false); -} - static inline int __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg, u32 mask, u32 value, unsigned int fast_timeout_us, @@ -133,6 +112,16 @@ __intel_wait_for_register(struct intel_uncore *uncore, i915_reg_t i915_reg, out_value, atomic); } +static inline int +__intel_wait_for_register_fw(struct intel_uncore *uncore, i915_reg_t i915_reg, + u32 mask, u32 value, unsigned int fast_timeout_us, + unsigned int slow_timeout_ms, u32 *out_value) +{ + return __intel_wait_for_register(uncore, i915_reg, mask, value, + fast_timeout_us, slow_timeout_ms, + out_value); +} + static inline u32 intel_uncore_read_fw(struct intel_uncore *uncore, i915_reg_t i915_reg) { -- 2.47.3