From d7cc4b6bc951c52d6dfc0e3cbcc81e900100c2a6 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 14 Oct 2025 22:18:04 +0300 Subject: [PATCH] drm/i915/dsc: Add prefill helper for DSC MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add intel_vdsc_prefill_lines() which tells us how many extra lines of latency the DSC adds to the pipe prefill. We shouldn't need a "worst case" vs, "current case" split here as the DSC state should only change during full modesets. The returned numbers are in .16 binary fixed point. Reviewed-by: Uma Shankar Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20251014191808.12326-6-ville.syrjala@linux.intel.com --- drivers/gpu/drm/i915/display/intel_vdsc.c | 8 ++++++++ drivers/gpu/drm/i915/display/intel_vdsc.h | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 8e799e225af17..bca747e24a7fa 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -1077,3 +1077,11 @@ int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state) return min_cdclk; } + +unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state) +{ + if (!crtc_state->dsc.compression_enable) + return 0; + + return 0x18000; /* 1.5 */ +} diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h index 9e2812f99dd74..2139391ff881d 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h @@ -32,5 +32,6 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder, void intel_vdsc_state_dump(struct drm_printer *p, int indent, const struct intel_crtc_state *crtc_state); int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state); +unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VDSC_H__ */ -- 2.47.3