From d88c3cb7c838350f8543eb863b69e20f65cd70e9 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sun, 3 Sep 2023 14:47:15 +0200 Subject: [PATCH] 4.19-stable patches added patches: fsi-master-ast-cf-add-module_firmware-macro.patch serial-sc16is7xx-fix-bug-when-first-setting-gpio-direction.patch --- ...ter-ast-cf-add-module_firmware-macro.patch | 29 +++++++++ ...ug-when-first-setting-gpio-direction.patch | 59 +++++++++++++++++++ queue-4.19/series | 2 + 3 files changed, 90 insertions(+) create mode 100644 queue-4.19/fsi-master-ast-cf-add-module_firmware-macro.patch create mode 100644 queue-4.19/serial-sc16is7xx-fix-bug-when-first-setting-gpio-direction.patch diff --git a/queue-4.19/fsi-master-ast-cf-add-module_firmware-macro.patch b/queue-4.19/fsi-master-ast-cf-add-module_firmware-macro.patch new file mode 100644 index 00000000000..94e6cf9c1dd --- /dev/null +++ b/queue-4.19/fsi-master-ast-cf-add-module_firmware-macro.patch @@ -0,0 +1,29 @@ +From 3a1d7aff6e65ad6e285e28abe55abbfd484997ee Mon Sep 17 00:00:00 2001 +From: Juerg Haefliger +Date: Wed, 28 Jun 2023 11:50:39 +0200 +Subject: fsi: master-ast-cf: Add MODULE_FIRMWARE macro + +From: Juerg Haefliger + +commit 3a1d7aff6e65ad6e285e28abe55abbfd484997ee upstream. + +The module loads firmware so add a MODULE_FIRMWARE macro to provide that +information via modinfo. + +Fixes: 6a794a27daca ("fsi: master-ast-cf: Add new FSI master using Aspeed ColdFire") +Cc: stable@vger.kernel.org # 4.19+ +Signed-off-by: Juerg Haefliger +Link: https://lore.kernel.org/r/20230628095039.26218-1-juerg.haefliger@canonical.com +Signed-off-by: Joel Stanley +Signed-off-by: Greg Kroah-Hartman +--- + drivers/fsi/fsi-master-ast-cf.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/fsi/fsi-master-ast-cf.c ++++ b/drivers/fsi/fsi-master-ast-cf.c +@@ -1438,3 +1438,4 @@ static struct platform_driver fsi_master + + module_platform_driver(fsi_master_acf); + MODULE_LICENSE("GPL"); ++MODULE_FIRMWARE(FW_FILE_NAME); diff --git a/queue-4.19/serial-sc16is7xx-fix-bug-when-first-setting-gpio-direction.patch b/queue-4.19/serial-sc16is7xx-fix-bug-when-first-setting-gpio-direction.patch new file mode 100644 index 00000000000..e457bb82f71 --- /dev/null +++ b/queue-4.19/serial-sc16is7xx-fix-bug-when-first-setting-gpio-direction.patch @@ -0,0 +1,59 @@ +From 9baeea723c0fb9c3ba9a336369f758ed9bc6831d Mon Sep 17 00:00:00 2001 +From: Hugo Villeneuve +Date: Mon, 7 Aug 2023 17:45:55 -0400 +Subject: serial: sc16is7xx: fix bug when first setting GPIO direction + +From: Hugo Villeneuve + +commit 9baeea723c0fb9c3ba9a336369f758ed9bc6831d upstream. + +When configuring a pin as an output pin with a value of logic 0, we +end up as having a value of logic 1 on the output pin. Setting a +logic 0 a second time (or more) after that will correctly output a +logic 0 on the output pin. + +By default, all GPIO pins are configured as inputs. When we enter +sc16is7xx_gpio_direction_output() for the first time, we first set the +desired value in IOSTATE, and then we configure the pin as an output. +The datasheet states that writing to IOSTATE register will trigger a +transfer of the value to the I/O pin configured as output, so if the +pin is configured as an input, nothing will be transferred. + +Therefore, set the direction first in IODIR, and then set the desired +value in IOSTATE. + +This is what is done in NXP application note AN10587. + +Fixes: dfeae619d781 ("serial: sc16is7xx") +Cc: stable@vger.kernel.org +Signed-off-by: Hugo Villeneuve +Reviewed-by: Lech Perczak +Tested-by: Lech Perczak +Link: https://lore.kernel.org/r/20230807214556.540627-6-hugo@hugovil.com +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/sc16is7xx.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +--- a/drivers/tty/serial/sc16is7xx.c ++++ b/drivers/tty/serial/sc16is7xx.c +@@ -1166,9 +1166,18 @@ static int sc16is7xx_gpio_direction_outp + state |= BIT(offset); + else + state &= ~BIT(offset); +- sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state); ++ ++ /* ++ * If we write IOSTATE first, and then IODIR, the output value is not ++ * transferred to the corresponding I/O pin. ++ * The datasheet states that each register bit will be transferred to ++ * the corresponding I/O pin programmed as output when writing to ++ * IOSTATE. Therefore, configure direction first with IODIR, and then ++ * set value after with IOSTATE. ++ */ + sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), + BIT(offset)); ++ sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state); + + return 0; + } diff --git a/queue-4.19/series b/queue-4.19/series index 28dab9b75fe..0e9bcb46f3e 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -7,3 +7,5 @@ usb-serial-option-add-quectel-em05g-variant-0x030e.patch usb-serial-option-add-foxconn-t99w368-t99w373-product.patch hid-wacom-remove-the-battery-when-the-ekr-is-off.patch bluetooth-btsdio-fix-use-after-free-bug-in-btsdio_remove-due-to-race-condition.patch +serial-sc16is7xx-fix-bug-when-first-setting-gpio-direction.patch +fsi-master-ast-cf-add-module_firmware-macro.patch -- 2.47.3