From e6a176eb272dfd40d92c2e7cadc419f2be7954e9 Mon Sep 17 00:00:00 2001 From: nobody <> Date: Mon, 15 Nov 2010 10:03:06 +0000 Subject: [PATCH] This commit was manufactured by cvs2svn to create branch 'binutils- 2_21-branch'. Cherrypick from master 2010-11-15 10:03:05 UTC Matthew Gretton-Dann ' PR gas/12198': gas/testsuite/gas/arm/pr12198-1.d gas/testsuite/gas/arm/pr12198-1.s gas/testsuite/gas/arm/pr12198-2.d gas/testsuite/gas/arm/pr12198-2.s gas/testsuite/gas/mips/elf-rel28-n32.d gas/testsuite/gas/mips/elf-rel28-n64.d gas/testsuite/gas/mips/elf-rel28.s --- gas/testsuite/gas/arm/pr12198-1.d | 12 ++ gas/testsuite/gas/arm/pr12198-1.s | 7 + gas/testsuite/gas/arm/pr12198-2.d | 13 ++ gas/testsuite/gas/arm/pr12198-2.s | 8 ++ gas/testsuite/gas/mips/elf-rel28-n32.d | 96 +++++++++++++ gas/testsuite/gas/mips/elf-rel28-n64.d | 180 +++++++++++++++++++++++++ gas/testsuite/gas/mips/elf-rel28.s | 48 +++++++ 7 files changed, 364 insertions(+) create mode 100644 gas/testsuite/gas/arm/pr12198-1.d create mode 100644 gas/testsuite/gas/arm/pr12198-1.s create mode 100644 gas/testsuite/gas/arm/pr12198-2.d create mode 100644 gas/testsuite/gas/arm/pr12198-2.s create mode 100644 gas/testsuite/gas/mips/elf-rel28-n32.d create mode 100644 gas/testsuite/gas/mips/elf-rel28-n64.d create mode 100644 gas/testsuite/gas/mips/elf-rel28.s diff --git a/gas/testsuite/gas/arm/pr12198-1.d b/gas/testsuite/gas/arm/pr12198-1.d new file mode 100644 index 00000000000..c5f7718745f --- /dev/null +++ b/gas/testsuite/gas/arm/pr12198-1.d @@ -0,0 +1,12 @@ +# name: PR12198 - Only select v6S-M when v6-M is selected (1) +# source: pr12198-1.s +# as: +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi + +Attribute Section: aeabi +File Attributes + Tag_CPU_arch: v4T + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Not allowed diff --git a/gas/testsuite/gas/arm/pr12198-1.s b/gas/testsuite/gas/arm/pr12198-1.s new file mode 100644 index 00000000000..15c880551f8 --- /dev/null +++ b/gas/testsuite/gas/arm/pr12198-1.s @@ -0,0 +1,7 @@ + .thumb + .global f + .type f, %function +f: + svc 0xab + bx lr + diff --git a/gas/testsuite/gas/arm/pr12198-2.d b/gas/testsuite/gas/arm/pr12198-2.d new file mode 100644 index 00000000000..39465c88838 --- /dev/null +++ b/gas/testsuite/gas/arm/pr12198-2.d @@ -0,0 +1,13 @@ +# name: PR12198 - Only select v6S-M when v6-M is selected (2) +# source: pr12198-2.s +# as: +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi + +Attribute Section: aeabi +File Attributes + Tag_CPU_arch: v6S-M + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Not allowed diff --git a/gas/testsuite/gas/arm/pr12198-2.s b/gas/testsuite/gas/arm/pr12198-2.s new file mode 100644 index 00000000000..711cc7ef141 --- /dev/null +++ b/gas/testsuite/gas/arm/pr12198-2.s @@ -0,0 +1,8 @@ + .thumb + .global f + .type f, %function +f: + svc 0xab + dsb + bx lr + diff --git a/gas/testsuite/gas/mips/elf-rel28-n32.d b/gas/testsuite/gas/mips/elf-rel28-n32.d new file mode 100644 index 00000000000..2ba277110b4 --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28-n32.d @@ -0,0 +1,96 @@ +#source: elf-rel28.s +#as: -n32 +#objdump: -dr +#name: MIPS ELF reloc 28 (n32) + +.*: file format .* + + +Disassembly of section \.text: + +.* : +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_CALL16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GPREL16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_HIGHEST bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_HIGHER bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_SUB bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_GD bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_CALL16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GPREL16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_HIGHEST bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_HIGHER bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_SUB bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_GD bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar + ... diff --git a/gas/testsuite/gas/mips/elf-rel28-n64.d b/gas/testsuite/gas/mips/elf-rel28-n64.d new file mode 100644 index 00000000000..be38e7d9cd1 --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28-n64.d @@ -0,0 +1,180 @@ +#source: elf-rel28.s +#as: -64 +#objdump: -dr +#name: MIPS ELF reloc 28 (n64) + +.*: file format .* + + +Disassembly of section \.text: + +.* : +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_CALL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GOT16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_GPREL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_HIGHEST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_HIGHER bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_SUB bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_GD bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: dc840000 ld a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_CALL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_CALL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_CALL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_DISP bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_PAGE bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_OFST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GOT16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_GPREL16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_HIGHEST bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_HIGHER bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_SUB bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_GD bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_LDM bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_DTPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_HI16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_TPREL_LO16 bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* +.*: fc840000 sd a0,0\(a0\) + .*: R_MIPS_TLS_GOTTPREL bar + .*: R_MIPS_NONE \*ABS\* + .*: R_MIPS_NONE \*ABS\* + \.\.\. diff --git a/gas/testsuite/gas/mips/elf-rel28.s b/gas/testsuite/gas/mips/elf-rel28.s new file mode 100644 index 00000000000..ec4fb660c90 --- /dev/null +++ b/gas/testsuite/gas/mips/elf-rel28.s @@ -0,0 +1,48 @@ + .ent foo +foo: + # Many of these do not make conceptual sense, but they should + # at least assemble. + ld $4,%call_hi(bar)($4) + ld $4,%call_lo(bar)($4) + ld $4,%call16(bar)($4) + ld $4,%got_disp(bar)($4) + ld $4,%got_page(bar)($4) + ld $4,%got_ofst(bar)($4) + ld $4,%got_hi(bar)($4) + ld $4,%got_lo(bar)($4) + ld $4,%got(bar)($4) + ld $4,%gp_rel(bar)($4) + ld $4,%half(bar)($4) + ld $4,%highest(bar)($4) + ld $4,%higher(bar)($4) + ld $4,%neg(bar)($4) + ld $4,%tlsgd(bar)($4) + ld $4,%tlsldm(bar)($4) + ld $4,%dtprel_hi(bar)($4) + ld $4,%dtprel_lo(bar)($4) + ld $4,%tprel_hi(bar)($4) + ld $4,%tprel_lo(bar)($4) + ld $4,%gottprel(bar)($4) + + sd $4,%call_hi(bar)($4) + sd $4,%call_lo(bar)($4) + sd $4,%call16(bar)($4) + sd $4,%got_disp(bar)($4) + sd $4,%got_page(bar)($4) + sd $4,%got_ofst(bar)($4) + sd $4,%got_hi(bar)($4) + sd $4,%got_lo(bar)($4) + sd $4,%got(bar)($4) + sd $4,%gp_rel(bar)($4) + sd $4,%half(bar)($4) + sd $4,%highest(bar)($4) + sd $4,%higher(bar)($4) + sd $4,%neg(bar)($4) + sd $4,%tlsgd(bar)($4) + sd $4,%tlsldm(bar)($4) + sd $4,%dtprel_hi(bar)($4) + sd $4,%dtprel_lo(bar)($4) + sd $4,%tprel_hi(bar)($4) + sd $4,%tprel_lo(bar)($4) + sd $4,%gottprel(bar)($4) + .end foo -- 2.47.3