From e92ef446cb4c2877b75e2afacf4de6d785660f74 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 6 Nov 2025 17:20:44 +0200 Subject: [PATCH] drm/i915/cx0: Get rid of XELPDP_MSGBUS_TIMEOUT_FAST_US MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit XELPDP_MSGBUS_TIMEOUT_FAST_US looks to be just an obfuscated version of the default 2 microsecond fast timeout used by intel_wait_for_register(). Get rid of it to make it clear what's going on here. Reviewed-by: Jani Nikula Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20251106152049.21115-6-ville.syrjala@linux.intel.com --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 +-- drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h | 1 - 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index e8a96a60fdd65..ddcfdf45bd38c 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -168,8 +168,7 @@ int intel_cx0_wait_for_ack(struct intel_encoder *encoder, XELPDP_PORT_P2M_MSGBUS_STATUS(display, port, lane), XELPDP_PORT_P2M_RESPONSE_READY, XELPDP_PORT_P2M_RESPONSE_READY, - XELPDP_MSGBUS_TIMEOUT_FAST_US, - XELPDP_MSGBUS_TIMEOUT_SLOW, val)) { + 2, XELPDP_MSGBUS_TIMEOUT_SLOW, val)) { drm_dbg_kms(display->drm, "PHY %c Timeout waiting for message ACK. Status: 0x%x\n", phy_name(phy), *val); diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h index 62db0fd99f4a5..f031de40f6c6c 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h @@ -75,7 +75,6 @@ #define XELPDP_PORT_P2M_ERROR_SET REG_BIT(15) #define XELPDP_MSGBUS_TIMEOUT_SLOW 1 -#define XELPDP_MSGBUS_TIMEOUT_FAST_US 2 #define XELPDP_PCLK_PLL_ENABLE_TIMEOUT_US 3200 #define XELPDP_PCLK_PLL_DISABLE_TIMEOUT_US 20 #define XELPDP_PORT_BUF_SOC_READY_TIMEOUT_US 100 -- 2.47.3