From eb541a4c03e0ea3b50e9425934b827b044a795c8 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sat, 3 May 2014 20:41:09 -0400 Subject: [PATCH] 3.14-stable patches added patches: arm-tegra-remove-uart5-uarte-from-tegra124.dtsi.patch clk-tegra-remove-non-existent-clocks.patch dt-tegra-remove-non-existent-clock-ids.patch usb-ehci-tegra-set-txfill_tuning.patch usb-pl2303-add-ids-for-hewlett-packard-hp-pos-pole-displays.patch usb-xhci-prefer-endpoint-context-dequeue-pointer-over-stopped_trb.patch --- ...emove-uart5-uarte-from-tegra124.dtsi.patch | 43 ++++ ...clk-tegra-remove-non-existent-clocks.patch | 46 ++++ ...-tegra-remove-non-existent-clock-ids.patch | 51 ++++ queue-3.14/series | 6 + .../usb-ehci-tegra-set-txfill_tuning.patch | 61 +++++ ...hewlett-packard-hp-pos-pole-displays.patch | 53 ++++ ...ext-dequeue-pointer-over-stopped_trb.patch | 228 ++++++++++++++++++ 7 files changed, 488 insertions(+) create mode 100644 queue-3.14/arm-tegra-remove-uart5-uarte-from-tegra124.dtsi.patch create mode 100644 queue-3.14/clk-tegra-remove-non-existent-clocks.patch create mode 100644 queue-3.14/dt-tegra-remove-non-existent-clock-ids.patch create mode 100644 queue-3.14/usb-ehci-tegra-set-txfill_tuning.patch create mode 100644 queue-3.14/usb-pl2303-add-ids-for-hewlett-packard-hp-pos-pole-displays.patch create mode 100644 queue-3.14/usb-xhci-prefer-endpoint-context-dequeue-pointer-over-stopped_trb.patch diff --git a/queue-3.14/arm-tegra-remove-uart5-uarte-from-tegra124.dtsi.patch b/queue-3.14/arm-tegra-remove-uart5-uarte-from-tegra124.dtsi.patch new file mode 100644 index 00000000000..9ca67691452 --- /dev/null +++ b/queue-3.14/arm-tegra-remove-uart5-uarte-from-tegra124.dtsi.patch @@ -0,0 +1,43 @@ +From 862f0eea38409ff0d7f226c1245b787e3f0e2607 Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Tue, 1 Apr 2014 14:13:15 -0600 +Subject: ARM: tegra: remove UART5/UARTE from tegra124.dtsi + +From: Stephen Warren + +commit 862f0eea38409ff0d7f226c1245b787e3f0e2607 upstream. + +Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth +UART, but this appears to be left-over from earlier SoC documentation. +Remove the non-existent DT node for UART5. + +Signed-off-by: Stephen Warren +Signed-off-by: Arnd Bergmann +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/boot/dts/tegra124.dtsi | 13 ------------- + 1 file changed, 13 deletions(-) + +--- a/arch/arm/boot/dts/tegra124.dtsi ++++ b/arch/arm/boot/dts/tegra124.dtsi +@@ -164,19 +164,6 @@ + status = "disabled"; + }; + +- serial@70006400 { +- compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; +- reg = <0x70006400 0x40>; +- reg-shift = <2>; +- interrupts = ; +- clocks = <&tegra_car TEGRA124_CLK_UARTE>; +- resets = <&tegra_car 66>; +- reset-names = "serial"; +- dmas = <&apbdma 20>, <&apbdma 20>; +- dma-names = "rx", "tx"; +- status = "disabled"; +- }; +- + pwm@7000a000 { + compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x100>; diff --git a/queue-3.14/clk-tegra-remove-non-existent-clocks.patch b/queue-3.14/clk-tegra-remove-non-existent-clocks.patch new file mode 100644 index 00000000000..cf3ca9fed73 --- /dev/null +++ b/queue-3.14/clk-tegra-remove-non-existent-clocks.patch @@ -0,0 +1,46 @@ +From 9ba71705706aa83bcd7f9b74ae2d167da934c951 Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Tue, 1 Apr 2014 14:13:16 -0600 +Subject: clk: tegra: remove non-existent clocks + +From: Stephen Warren + +commit 9ba71705706aa83bcd7f9b74ae2d167da934c951 upstream. + +The Tegra124 clock driver currently provides 3 clocks that don't actually +exist; 2 for NAND and one for UART5/UARTE. Delete these. + +Signed-off-by: Stephen Warren +Signed-off-by: Arnd Bergmann +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/tegra/clk-tegra124.c | 3 --- + 1 file changed, 3 deletions(-) + +--- a/drivers/clk/tegra/clk-tegra124.c ++++ b/drivers/clk/tegra/clk-tegra124.c +@@ -764,7 +764,6 @@ static struct tegra_clk tegra124_clks[te + [tegra_clk_sdmmc2_8] = { .dt_id = TEGRA124_CLK_SDMMC2, .present = true }, + [tegra_clk_i2s1] = { .dt_id = TEGRA124_CLK_I2S1, .present = true }, + [tegra_clk_i2c1] = { .dt_id = TEGRA124_CLK_I2C1, .present = true }, +- [tegra_clk_ndflash] = { .dt_id = TEGRA124_CLK_NDFLASH, .present = true }, + [tegra_clk_sdmmc1_8] = { .dt_id = TEGRA124_CLK_SDMMC1, .present = true }, + [tegra_clk_sdmmc4_8] = { .dt_id = TEGRA124_CLK_SDMMC4, .present = true }, + [tegra_clk_pwm] = { .dt_id = TEGRA124_CLK_PWM, .present = true }, +@@ -809,7 +808,6 @@ static struct tegra_clk tegra124_clks[te + [tegra_clk_trace] = { .dt_id = TEGRA124_CLK_TRACE, .present = true }, + [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true }, + [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true }, +- [tegra_clk_ndspeed] = { .dt_id = TEGRA124_CLK_NDSPEED, .present = true }, + [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true }, + [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true }, + [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true }, +@@ -952,7 +950,6 @@ static struct tegra_clk tegra124_clks[te + [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true }, + [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true }, + [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true }, +- [tegra_clk_uarte] = { .dt_id = TEGRA124_CLK_UARTE, .present = true }, + }; + + static struct tegra_devclk devclks[] __initdata = { diff --git a/queue-3.14/dt-tegra-remove-non-existent-clock-ids.patch b/queue-3.14/dt-tegra-remove-non-existent-clock-ids.patch new file mode 100644 index 00000000000..3e3d84a1803 --- /dev/null +++ b/queue-3.14/dt-tegra-remove-non-existent-clock-ids.patch @@ -0,0 +1,51 @@ +From 9ef1af9ea28c23d0eaed97f7f5142788b6cf570a Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Tue, 1 Apr 2014 14:13:17 -0600 +Subject: dt: tegra: remove non-existent clock IDs + +From: Stephen Warren + +commit 9ef1af9ea28c23d0eaed97f7f5142788b6cf570a upstream. + +The Tegra124 clock DT binding currently provides 3 clocks that don't +actually exist; 2 for NAND and one for UART5/UARTE. Delete these. While +this is technically an incompatible DT ABI change, nothing could have +used these clock IDs for anything practical, since the HW doesn't exist. + +Signed-off-by: Stephen Warren +Signed-off-by: Arnd Bergmann +Signed-off-by: Greg Kroah-Hartman + +--- + include/dt-bindings/clock/tegra124-car.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/include/dt-bindings/clock/tegra124-car.h ++++ b/include/dt-bindings/clock/tegra124-car.h +@@ -29,7 +29,7 @@ + /* 10 (register bit affects spdif_in and spdif_out) */ + #define TEGRA124_CLK_I2S1 11 + #define TEGRA124_CLK_I2C1 12 +-#define TEGRA124_CLK_NDFLASH 13 ++/* 13 */ + #define TEGRA124_CLK_SDMMC1 14 + #define TEGRA124_CLK_SDMMC4 15 + /* 16 */ +@@ -83,7 +83,7 @@ + + /* 64 */ + #define TEGRA124_CLK_UARTD 65 +-#define TEGRA124_CLK_UARTE 66 ++/* 66 */ + #define TEGRA124_CLK_I2C3 67 + #define TEGRA124_CLK_SBC4 68 + #define TEGRA124_CLK_SDMMC3 69 +@@ -97,7 +97,7 @@ + #define TEGRA124_CLK_TRACE 77 + #define TEGRA124_CLK_SOC_THERM 78 + #define TEGRA124_CLK_DTV 79 +-#define TEGRA124_CLK_NDSPEED 80 ++/* 80 */ + #define TEGRA124_CLK_I2CSLOW 81 + #define TEGRA124_CLK_DSIB 82 + #define TEGRA124_CLK_TSEC 83 diff --git a/queue-3.14/series b/queue-3.14/series index ab97d95218e..e04c2b112d0 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -150,3 +150,9 @@ ext4-note-the-error-in-ext4_end_bio.patch ext4-fix-jbd2-warning-under-heavy-xattr-load.patch ext4-move-ext4_update_i_disksize-into-mpage_map_and_submit_extent.patch ext4-use-i_size_read-in-ext4_unaligned_aio.patch +usb-xhci-prefer-endpoint-context-dequeue-pointer-over-stopped_trb.patch +arm-tegra-remove-uart5-uarte-from-tegra124.dtsi.patch +clk-tegra-remove-non-existent-clocks.patch +dt-tegra-remove-non-existent-clock-ids.patch +usb-ehci-tegra-set-txfill_tuning.patch +usb-pl2303-add-ids-for-hewlett-packard-hp-pos-pole-displays.patch diff --git a/queue-3.14/usb-ehci-tegra-set-txfill_tuning.patch b/queue-3.14/usb-ehci-tegra-set-txfill_tuning.patch new file mode 100644 index 00000000000..24056ddd036 --- /dev/null +++ b/queue-3.14/usb-ehci-tegra-set-txfill_tuning.patch @@ -0,0 +1,61 @@ +From 4f2fe2d27472f4a5dbd875888af4fc5175f3fdc5 Mon Sep 17 00:00:00 2001 +From: Stephen Warren +Date: Mon, 14 Apr 2014 15:21:23 -0600 +Subject: USB: EHCI: tegra: set txfill_tuning + +From: Stephen Warren + +commit 4f2fe2d27472f4a5dbd875888af4fc5175f3fdc5 upstream. + +To avoid memory fetch underflows with larger USB transfers, Tegra SoCs +need txfill_tuning's txfifothresh register field set to a non-default +value. Add a custom reset override in order to set this up. + +These values are recommended practice for all Tegra chips. However, +I've only noticed practical problems when not setting them this way on +systems using Tegra124. Hence, CC: stable only for recent kernels which +actually support Tegra124. + +Signed-off-by: Stephen Warren +Acked-by: Alan Stern +Tested-by: Alexandre Courbot +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/usb/host/ehci-tegra.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/usb/host/ehci-tegra.c ++++ b/drivers/usb/host/ehci-tegra.c +@@ -513,8 +513,31 @@ static struct platform_driver tegra_ehci + } + }; + ++static int tegra_ehci_reset(struct usb_hcd *hcd) ++{ ++ struct ehci_hcd *ehci = hcd_to_ehci(hcd); ++ int retval; ++ int txfifothresh; ++ ++ retval = ehci_setup(hcd); ++ if (retval) ++ return retval; ++ ++ /* ++ * We should really pull this value out of tegra_ehci_soc_config, but ++ * to avoid needing access to it, make use of the fact that Tegra20 is ++ * the only one so far that needs a value of 10, and Tegra20 is the ++ * only one which doesn't set has_hostpc. ++ */ ++ txfifothresh = ehci->has_hostpc ? 0x10 : 10; ++ ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning); ++ ++ return 0; ++} ++ + static const struct ehci_driver_overrides tegra_overrides __initconst = { + .extra_priv_size = sizeof(struct tegra_ehci_hcd), ++ .reset = tegra_ehci_reset, + }; + + static int __init ehci_tegra_init(void) diff --git a/queue-3.14/usb-pl2303-add-ids-for-hewlett-packard-hp-pos-pole-displays.patch b/queue-3.14/usb-pl2303-add-ids-for-hewlett-packard-hp-pos-pole-displays.patch new file mode 100644 index 00000000000..c3cef2f259a --- /dev/null +++ b/queue-3.14/usb-pl2303-add-ids-for-hewlett-packard-hp-pos-pole-displays.patch @@ -0,0 +1,53 @@ +From b16c02fbfb963fa2941b7517ebf1f8a21946775e Mon Sep 17 00:00:00 2001 +From: Aaron Sanders +Date: Mon, 31 Mar 2014 15:54:21 +0200 +Subject: USB: pl2303: add ids for Hewlett-Packard HP POS pole displays + +From: Aaron Sanders + +commit b16c02fbfb963fa2941b7517ebf1f8a21946775e upstream. + +Add device ids to pl2303 for the Hewlett-Packard HP POS pole displays: + +LD960: 03f0:0B39 +LCM220: 03f0:3139 +LCM960: 03f0:3239 + +[ Johan: fix indentation and sort PIDs numerically ] + +Signed-off-by: Aaron Sanders +Signed-off-by: Johan Hovold +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/usb/serial/pl2303.c | 3 +++ + drivers/usb/serial/pl2303.h | 5 ++++- + 2 files changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/usb/serial/pl2303.c ++++ b/drivers/usb/serial/pl2303.c +@@ -83,6 +83,9 @@ static const struct usb_device_id id_tab + { USB_DEVICE(YCCABLE_VENDOR_ID, YCCABLE_PRODUCT_ID) }, + { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) }, + { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) }, ++ { USB_DEVICE(HP_VENDOR_ID, HP_LD960_PRODUCT_ID) }, ++ { USB_DEVICE(HP_VENDOR_ID, HP_LCM220_PRODUCT_ID) }, ++ { USB_DEVICE(HP_VENDOR_ID, HP_LCM960_PRODUCT_ID) }, + { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) }, + { USB_DEVICE(ZEAGLE_VENDOR_ID, ZEAGLE_N2ITION3_PRODUCT_ID) }, + { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) }, +--- a/drivers/usb/serial/pl2303.h ++++ b/drivers/usb/serial/pl2303.h +@@ -121,8 +121,11 @@ + #define SUPERIAL_VENDOR_ID 0x5372 + #define SUPERIAL_PRODUCT_ID 0x2303 + +-/* Hewlett-Packard LD220-HP POS Pole Display */ ++/* Hewlett-Packard POS Pole Displays */ + #define HP_VENDOR_ID 0x03f0 ++#define HP_LD960_PRODUCT_ID 0x0b39 ++#define HP_LCM220_PRODUCT_ID 0x3139 ++#define HP_LCM960_PRODUCT_ID 0x3239 + #define HP_LD220_PRODUCT_ID 0x3524 + + /* Cressi Edy (diving computer) PC interface */ diff --git a/queue-3.14/usb-xhci-prefer-endpoint-context-dequeue-pointer-over-stopped_trb.patch b/queue-3.14/usb-xhci-prefer-endpoint-context-dequeue-pointer-over-stopped_trb.patch new file mode 100644 index 00000000000..bd320cc6c39 --- /dev/null +++ b/queue-3.14/usb-xhci-prefer-endpoint-context-dequeue-pointer-over-stopped_trb.patch @@ -0,0 +1,228 @@ +From 1f81b6d22a5980955b01e08cf27fb745dc9b686f Mon Sep 17 00:00:00 2001 +From: Julius Werner +Date: Fri, 25 Apr 2014 19:20:13 +0300 +Subject: usb: xhci: Prefer endpoint context dequeue pointer over stopped_trb + +From: Julius Werner + +commit 1f81b6d22a5980955b01e08cf27fb745dc9b686f upstream. + +We have observed a rare cycle state desync bug after Set TR Dequeue +Pointer commands on Intel LynxPoint xHCs (resulting in an endpoint that +doesn't fetch new TRBs and thus an unresponsive USB device). It always +triggers when a previous Set TR Dequeue Pointer command has set the +pointer to the final Link TRB of a segment, and then another URB gets +enqueued and cancelled again before it can be completed. Further +investigation showed that the xHC had returned the Link TRB in the TRB +Pointer field of the Transfer Event (CC == Stopped -- Length Invalid), +but when xhci_find_new_dequeue_state() later accesses the Endpoint +Context's TR Dequeue Pointer field it is set to the first TRB of the +next segment. + +The driver expects those two values to be the same in this situation, +and uses the cycle state of the latter together with the address of the +former. This should be fine according to the XHCI specification, since +the endpoint ring should be stopped when returning the Transfer Event +and thus should not advance over the Link TRB before it gets restarted. +However, real-world XHCI implementations apparently don't really care +that much about these details, so the driver should follow a more +defensive approach to try to work around HC spec violations. + +This patch removes the stopped_trb variable that had been used to store +the TRB Pointer from the last Transfer Event of a stopped TRB. Instead, +xhci_find_new_dequeue_state() now relies only on the Endpoint Context, +requiring a small amount of additional processing to find the virtual +address corresponding to the TR Dequeue Pointer. Some other parts of the +function were slightly rearranged to better fit into this model. + +This patch should be backported to kernels as old as 2.6.31 that contain +the commit ae636747146ea97efa18e04576acd3416e2514f5 "USB: xhci: URB +cancellation support." + +Signed-off-by: Julius Werner +Signed-off-by: Mathias Nyman +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/usb/host/xhci-ring.c | 67 +++++++++++++++++++------------------------ + drivers/usb/host/xhci.c | 1 + drivers/usb/host/xhci.h | 2 - + 3 files changed, 31 insertions(+), 39 deletions(-) + +--- a/drivers/usb/host/xhci-ring.c ++++ b/drivers/usb/host/xhci-ring.c +@@ -550,6 +550,7 @@ void xhci_find_new_dequeue_state(struct + struct xhci_generic_trb *trb; + struct xhci_ep_ctx *ep_ctx; + dma_addr_t addr; ++ u64 hw_dequeue; + + ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id, + ep_index, stream_id); +@@ -559,56 +560,57 @@ void xhci_find_new_dequeue_state(struct + stream_id); + return; + } +- state->new_cycle_state = 0; +- xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, +- "Finding segment containing stopped TRB."); +- state->new_deq_seg = find_trb_seg(cur_td->start_seg, +- dev->eps[ep_index].stopped_trb, +- &state->new_cycle_state); +- if (!state->new_deq_seg) { +- WARN_ON(1); +- return; +- } + + /* Dig out the cycle state saved by the xHC during the stop ep cmd */ + xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, + "Finding endpoint context"); + ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); +- state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq); ++ hw_dequeue = le64_to_cpu(ep_ctx->deq); ++ ++ /* Find virtual address and segment of hardware dequeue pointer */ ++ state->new_deq_seg = ep_ring->deq_seg; ++ state->new_deq_ptr = ep_ring->dequeue; ++ while (xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr) ++ != (dma_addr_t)(hw_dequeue & ~0xf)) { ++ next_trb(xhci, ep_ring, &state->new_deq_seg, ++ &state->new_deq_ptr); ++ if (state->new_deq_ptr == ep_ring->dequeue) { ++ WARN_ON(1); ++ return; ++ } ++ } ++ /* ++ * Find cycle state for last_trb, starting at old cycle state of ++ * hw_dequeue. If there is only one segment ring, find_trb_seg() will ++ * return immediately and cannot toggle the cycle state if this search ++ * wraps around, so add one more toggle manually in that case. ++ */ ++ state->new_cycle_state = hw_dequeue & 0x1; ++ if (ep_ring->first_seg == ep_ring->first_seg->next && ++ cur_td->last_trb < state->new_deq_ptr) ++ state->new_cycle_state ^= 0x1; + + state->new_deq_ptr = cur_td->last_trb; + xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, + "Finding segment containing last TRB in TD."); + state->new_deq_seg = find_trb_seg(state->new_deq_seg, +- state->new_deq_ptr, +- &state->new_cycle_state); ++ state->new_deq_ptr, &state->new_cycle_state); + if (!state->new_deq_seg) { + WARN_ON(1); + return; + } + ++ /* Increment to find next TRB after last_trb. Cycle if appropriate. */ + trb = &state->new_deq_ptr->generic; + if (TRB_TYPE_LINK_LE32(trb->field[3]) && + (trb->field[3] & cpu_to_le32(LINK_TOGGLE))) + state->new_cycle_state ^= 0x1; + next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); + +- /* +- * If there is only one segment in a ring, find_trb_seg()'s while loop +- * will not run, and it will return before it has a chance to see if it +- * needs to toggle the cycle bit. It can't tell if the stalled transfer +- * ended just before the link TRB on a one-segment ring, or if the TD +- * wrapped around the top of the ring, because it doesn't have the TD in +- * question. Look for the one-segment case where stalled TRB's address +- * is greater than the new dequeue pointer address. +- */ +- if (ep_ring->first_seg == ep_ring->first_seg->next && +- state->new_deq_ptr < dev->eps[ep_index].stopped_trb) +- state->new_cycle_state ^= 0x1; ++ /* Don't update the ring cycle state for the producer (us). */ + xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, + "Cycle state = 0x%x", state->new_cycle_state); + +- /* Don't update the ring cycle state for the producer (us). */ + xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, + "New dequeue segment = %p (virtual)", + state->new_deq_seg); +@@ -791,7 +793,6 @@ static void xhci_handle_cmd_stop_ep(stru + if (list_empty(&ep->cancelled_td_list)) { + xhci_stop_watchdog_timer_in_irq(xhci, ep); + ep->stopped_td = NULL; +- ep->stopped_trb = NULL; + ring_doorbell_for_active_rings(xhci, slot_id, ep_index); + return; + } +@@ -859,11 +860,9 @@ remove_finished_td: + ring_doorbell_for_active_rings(xhci, slot_id, ep_index); + } + +- /* Clear stopped_td and stopped_trb if endpoint is not halted */ +- if (!(ep->ep_state & EP_HALTED)) { ++ /* Clear stopped_td if endpoint is not halted */ ++ if (!(ep->ep_state & EP_HALTED)) + ep->stopped_td = NULL; +- ep->stopped_trb = NULL; +- } + + /* + * Drop the lock and complete the URBs in the cancelled TD list. +@@ -1908,14 +1907,12 @@ static void xhci_cleanup_halted_endpoint + struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; + ep->ep_state |= EP_HALTED; + ep->stopped_td = td; +- ep->stopped_trb = event_trb; + ep->stopped_stream = stream_id; + + xhci_queue_reset_ep(xhci, slot_id, ep_index); + xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index); + + ep->stopped_td = NULL; +- ep->stopped_trb = NULL; + ep->stopped_stream = 0; + + xhci_ring_cmd_db(xhci); +@@ -1997,7 +1994,6 @@ static int finish_td(struct xhci_hcd *xh + * the ring dequeue pointer or take this TD off any lists yet. + */ + ep->stopped_td = td; +- ep->stopped_trb = event_trb; + return 0; + } else { + if (trb_comp_code == COMP_STALL) { +@@ -2009,7 +2005,6 @@ static int finish_td(struct xhci_hcd *xh + * USB class driver clear the stall later. + */ + ep->stopped_td = td; +- ep->stopped_trb = event_trb; + ep->stopped_stream = ep_ring->stream_id; + } else if (xhci_requires_manual_halt_cleanup(xhci, + ep_ctx, trb_comp_code)) { +@@ -2626,7 +2621,7 @@ static int handle_tx_event(struct xhci_h + * successful event after a short transfer. + * Ignore it. + */ +- if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) && ++ if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) && + ep_ring->last_td_was_short) { + ep_ring->last_td_was_short = false; + ret = 0; +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -2933,7 +2933,6 @@ void xhci_endpoint_reset(struct usb_hcd + xhci_ring_cmd_db(xhci); + } + virt_ep->stopped_td = NULL; +- virt_ep->stopped_trb = NULL; + virt_ep->stopped_stream = 0; + spin_unlock_irqrestore(&xhci->lock, flags); + +--- a/drivers/usb/host/xhci.h ++++ b/drivers/usb/host/xhci.h +@@ -864,8 +864,6 @@ struct xhci_virt_ep { + #define EP_GETTING_NO_STREAMS (1 << 5) + /* ---- Related to URB cancellation ---- */ + struct list_head cancelled_td_list; +- /* The TRB that was last reported in a stopped endpoint ring */ +- union xhci_trb *stopped_trb; + struct xhci_td *stopped_td; + unsigned int stopped_stream; + /* Watchdog timer for stop endpoint command to cancel URBs */ -- 2.47.3