From f9d20529299b0e8c911e20111a433ff10bba4fce Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 12 Mar 2021 13:16:07 +0100 Subject: [PATCH] 5.4-stable patches added patches: net-enetc-don-t-overwrite-the-rss-indirection-table-when-initializing.patch sh_eth-fix-trscer-mask-for-sh771x.patch --- ...-indirection-table-when-initializing.patch | 145 ++++++++++++++++++ queue-5.4/series | 2 + .../sh_eth-fix-trscer-mask-for-sh771x.patch | 36 +++++ 3 files changed, 183 insertions(+) create mode 100644 queue-5.4/net-enetc-don-t-overwrite-the-rss-indirection-table-when-initializing.patch create mode 100644 queue-5.4/sh_eth-fix-trscer-mask-for-sh771x.patch diff --git a/queue-5.4/net-enetc-don-t-overwrite-the-rss-indirection-table-when-initializing.patch b/queue-5.4/net-enetc-don-t-overwrite-the-rss-indirection-table-when-initializing.patch new file mode 100644 index 00000000000..57fbe506873 --- /dev/null +++ b/queue-5.4/net-enetc-don-t-overwrite-the-rss-indirection-table-when-initializing.patch @@ -0,0 +1,145 @@ +From c646d10dda2dcde82c6ce5a474522621ab2b8b19 Mon Sep 17 00:00:00 2001 +From: Vladimir Oltean +Date: Mon, 1 Mar 2021 13:18:11 +0200 +Subject: net: enetc: don't overwrite the RSS indirection table when initializing + +From: Vladimir Oltean + +commit c646d10dda2dcde82c6ce5a474522621ab2b8b19 upstream. + +After the blamed patch, all RX traffic gets hashed to CPU 0 because the +hashing indirection table set up in: + +enetc_pf_probe +-> enetc_alloc_si_resources + -> enetc_configure_si + -> enetc_setup_default_rss_table + +is overwritten later in: + +enetc_pf_probe +-> enetc_init_port_rss_memory + +which zero-initializes the entire port RSS table in order to avoid ECC errors. + +The trouble really is that enetc_init_port_rss_memory really neads +enetc_alloc_si_resources to be called, because it depends upon +enetc_alloc_cbdr and enetc_setup_cbdr. But that whole enetc_configure_si +thing could have been better thought out, it has nothing to do in a +function called "alloc_si_resources", especially since its counterpart, +"free_si_resources", does nothing to unwind the configuration of the SI. + +The point is, we need to pull out enetc_configure_si out of +enetc_alloc_resources, and move it after enetc_init_port_rss_memory. +This allows us to set up the default RSS indirection table after +initializing the memory. + +Fixes: 07bf34a50e32 ("net: enetc: initialize the RFS and RSS memories") +Cc: Jesse Brandeburg +Signed-off-by: Vladimir Oltean +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/freescale/enetc/enetc.c | 11 +++-------- + drivers/net/ethernet/freescale/enetc/enetc.h | 1 + + drivers/net/ethernet/freescale/enetc/enetc_pf.c | 7 +++++++ + drivers/net/ethernet/freescale/enetc/enetc_vf.c | 7 +++++++ + 4 files changed, 18 insertions(+), 8 deletions(-) + +--- a/drivers/net/ethernet/freescale/enetc/enetc.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc.c +@@ -1016,13 +1016,12 @@ static int enetc_setup_default_rss_table + return 0; + } + +-static int enetc_configure_si(struct enetc_ndev_priv *priv) ++int enetc_configure_si(struct enetc_ndev_priv *priv) + { + struct enetc_si *si = priv->si; + struct enetc_hw *hw = &si->hw; + int err; + +- enetc_setup_cbdr(hw, &si->cbd_ring); + /* set SI cache attributes */ + enetc_wr(hw, ENETC_SICAR0, + ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT); +@@ -1068,6 +1067,8 @@ int enetc_alloc_si_resources(struct enet + if (err) + return err; + ++ enetc_setup_cbdr(&si->hw, &si->cbd_ring); ++ + priv->cls_rules = kcalloc(si->num_fs_entries, sizeof(*priv->cls_rules), + GFP_KERNEL); + if (!priv->cls_rules) { +@@ -1075,14 +1076,8 @@ int enetc_alloc_si_resources(struct enet + goto err_alloc_cls; + } + +- err = enetc_configure_si(priv); +- if (err) +- goto err_config_si; +- + return 0; + +-err_config_si: +- kfree(priv->cls_rules); + err_alloc_cls: + enetc_clear_cbdr(&si->hw); + enetc_free_cbdr(priv->dev, &si->cbd_ring); +--- a/drivers/net/ethernet/freescale/enetc/enetc.h ++++ b/drivers/net/ethernet/freescale/enetc/enetc.h +@@ -221,6 +221,7 @@ void enetc_get_si_caps(struct enetc_si * + void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); + int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); + void enetc_free_si_resources(struct enetc_ndev_priv *priv); ++int enetc_configure_si(struct enetc_ndev_priv *priv); + + int enetc_open(struct net_device *ndev); + int enetc_close(struct net_device *ndev); +--- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c +@@ -920,6 +920,12 @@ static int enetc_pf_probe(struct pci_dev + goto err_init_port_rss; + } + ++ err = enetc_configure_si(priv); ++ if (err) { ++ dev_err(&pdev->dev, "Failed to configure SI\n"); ++ goto err_config_si; ++ } ++ + err = enetc_alloc_msix(priv); + if (err) { + dev_err(&pdev->dev, "MSIX alloc failed\n"); +@@ -945,6 +951,7 @@ err_reg_netdev: + enetc_mdio_remove(pf); + enetc_of_put_phy(priv); + enetc_free_msix(priv); ++err_config_si: + err_init_port_rss: + err_init_port_rfs: + err_alloc_msix: +--- a/drivers/net/ethernet/freescale/enetc/enetc_vf.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc_vf.c +@@ -189,6 +189,12 @@ static int enetc_vf_probe(struct pci_dev + goto err_alloc_si_res; + } + ++ err = enetc_configure_si(priv); ++ if (err) { ++ dev_err(&pdev->dev, "Failed to configure SI\n"); ++ goto err_config_si; ++ } ++ + err = enetc_alloc_msix(priv); + if (err) { + dev_err(&pdev->dev, "MSIX alloc failed\n"); +@@ -208,6 +214,7 @@ static int enetc_vf_probe(struct pci_dev + + err_reg_netdev: + enetc_free_msix(priv); ++err_config_si: + err_alloc_msix: + enetc_free_si_resources(priv); + err_alloc_si_res: diff --git a/queue-5.4/series b/queue-5.4/series index 35c414effe9..7c920273a0b 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -6,6 +6,7 @@ net-fix-gro-aggregation-for-udp-encaps-with-zero-csum.patch net-check-if-protocol-extracted-by-virtio_net_hdr_set_proto-is-correct.patch net-avoid-infinite-loop-in-mpls_gso_segment-when-mpls_hlen-0.patch gpiolib-acpi-allow-to-find-gpioint-resource-by-name-and-index.patch +sh_eth-fix-trscer-mask-for-sh771x.patch can-skb-can_skb_set_owner-fix-ref-counting-if-socket-was-closed-before-setting-skb-ownership.patch gpio-pca953x-set-irq-type-when-handle-intel-galileo-gen-2.patch can-flexcan-assert-frz-bit-in-flexcan_chip_freeze.patch @@ -24,3 +25,4 @@ powerpc-603-fix-protection-of-user-pages-mapped-with-prot_none.patch mount-fix-mounting-of-detached-mounts-onto-targets-that-reside-on-shared-mounts.patch cifs-return-proper-error-code-in-statfs-2.patch revert-mm-slub-consider-rest-of-partial-list-if-acquire_slab-fails.patch +net-enetc-don-t-overwrite-the-rss-indirection-table-when-initializing.patch diff --git a/queue-5.4/sh_eth-fix-trscer-mask-for-sh771x.patch b/queue-5.4/sh_eth-fix-trscer-mask-for-sh771x.patch new file mode 100644 index 00000000000..76299b7c4d0 --- /dev/null +++ b/queue-5.4/sh_eth-fix-trscer-mask-for-sh771x.patch @@ -0,0 +1,36 @@ +From 8c91bc3d44dfef8284af384877fbe61117e8b7d1 Mon Sep 17 00:00:00 2001 +From: Sergey Shtylyov +Date: Sun, 28 Feb 2021 23:25:43 +0300 +Subject: sh_eth: fix TRSCER mask for SH771x + +From: Sergey Shtylyov + +commit 8c91bc3d44dfef8284af384877fbe61117e8b7d1 upstream. + +According to the SH7710, SH7712, SH7713 Group User's Manual: Hardware, +Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named +differently), with all the other bits reserved. Apparently, this was not +the case with some early revisions of the manual as we have the other +bits declared (and set) in the original driver. Follow the suit and add +the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x... + +Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet") +Signed-off-by: Sergey Shtylyov +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/renesas/sh_eth.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/net/ethernet/renesas/sh_eth.c ++++ b/drivers/net/ethernet/renesas/sh_eth.c +@@ -1131,6 +1131,9 @@ static struct sh_eth_cpu_data sh771x_dat + EESIPR_CEEFIP | EESIPR_CELFIP | + EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP | + EESIPR_PREIP | EESIPR_CERFIP, ++ ++ .trscer_err_mask = DESC_I_RINT8, ++ + .tsu = 1, + .dual_port = 1, + }; -- 2.47.3