From ff6b3cad757327dd2df3637793b930bb899c8f0c Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Thu, 27 Jun 2024 10:07:05 -0400 Subject: [PATCH] Fixes for 4.19 Signed-off-by: Sasha Levin --- ...lock-in-create_pinctrl-when-handling.patch | 48 ++++++++ ...-fix-pinmux-bits-for-rk3328-gpio2-b-.patch | 69 +++++++++++ ...-fix-pinmux-bits-for-rk3328-gpio3-b-.patch | 111 ++++++++++++++++++ ...-fix-pinmux-reset-in-rockchip_pmx_se.patch | 42 +++++++ queue-4.19/series | 4 + 5 files changed, 274 insertions(+) create mode 100644 queue-4.19/pinctrl-fix-deadlock-in-create_pinctrl-when-handling.patch create mode 100644 queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio2-b-.patch create mode 100644 queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio3-b-.patch create mode 100644 queue-4.19/pinctrl-rockchip-fix-pinmux-reset-in-rockchip_pmx_se.patch diff --git a/queue-4.19/pinctrl-fix-deadlock-in-create_pinctrl-when-handling.patch b/queue-4.19/pinctrl-fix-deadlock-in-create_pinctrl-when-handling.patch new file mode 100644 index 00000000000..aeb229dc969 --- /dev/null +++ b/queue-4.19/pinctrl-fix-deadlock-in-create_pinctrl-when-handling.patch @@ -0,0 +1,48 @@ +From 2bdf0c7dd95b2c8576450f9a31181d21e5ee2eee Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 08:58:38 +0000 +Subject: pinctrl: fix deadlock in create_pinctrl() when handling -EPROBE_DEFER + +From: Hagar Hemdan + +[ Upstream commit adec57ff8e66aee632f3dd1f93787c13d112b7a1 ] + +In create_pinctrl(), pinctrl_maps_mutex is acquired before calling +add_setting(). If add_setting() returns -EPROBE_DEFER, create_pinctrl() +calls pinctrl_free(). However, pinctrl_free() attempts to acquire +pinctrl_maps_mutex, which is already held by create_pinctrl(), leading to +a potential deadlock. + +This patch resolves the issue by releasing pinctrl_maps_mutex before +calling pinctrl_free(), preventing the deadlock. + +This bug was discovered and resolved using Coverity Static Analysis +Security Testing (SAST) by Synopsys, Inc. + +Fixes: 42fed7ba44e4 ("pinctrl: move subsystem mutex to pinctrl_dev struct") +Suggested-by: Maximilian Heyne +Signed-off-by: Hagar Hemdan +Link: https://lore.kernel.org/r/20240604085838.3344-1-hagarhem@amazon.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index 052894d3a2047..97b1fa3a5e78d 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -1078,8 +1078,8 @@ static struct pinctrl *create_pinctrl(struct device *dev, + * an -EPROBE_DEFER later, as that is the worst case. + */ + if (ret == -EPROBE_DEFER) { +- pinctrl_free(p, false); + mutex_unlock(&pinctrl_maps_mutex); ++ pinctrl_free(p, false); + return ERR_PTR(ret); + } + } +-- +2.43.0 + diff --git a/queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio2-b-.patch b/queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio2-b-.patch new file mode 100644 index 00000000000..f1f6133d569 --- /dev/null +++ b/queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio2-b-.patch @@ -0,0 +1,69 @@ +From 0e4d81bdf25a732c8f9c0c2d834cb3ee72dc3848 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 20:57:52 +0800 +Subject: pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins + +From: Huang-Huang Bao + +[ Upstream commit e8448a6c817c2aa6c6af785b1d45678bd5977e8d ] + +The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width, +correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is +recalculated so it remain unchanged. + +The pinmux bits for those pins are not explicitly specified in RK3328 +TRM, however we can get hint from pad name and its correspinding IOMUX +setting for pins in interface descriptions. The correspinding IOMIX +settings for GPIO2-B0 to GPIO2-B6 can be found in the same row next to +occurrences of following pad names in RK3328 TRM. + +GPIO2-B0: IO_SPIclkm0_GPIO2B0vccio5 +GPIO2-B1: IO_SPItxdm0_GPIO2B1vccio5 +GPIO2-B2: IO_SPIrxdm0_GPIO2B2vccio5 +GPIO2-B3: IO_SPIcsn0m0_GPIO2B3vccio5 +GPIO2-B4: IO_SPIcsn1m0_FLASHvol_sel_GPIO2B4vccio5 +GPIO2-B5: IO_ I2C2sda_TSADCshut_GPIO2B5vccio5 +GPIO2-B6: IO_ I2C2scl_GPIO2B6vccio5 + +This fix has been tested on NanoPi R2S for fixing confliting pinmux bits +between GPIO2-B7 with GPIO2-B5. + +Signed-off-by: Huang-Huang Bao +Reviewed-by: Heiko Stuebner +Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") +Link: https://lore.kernel.org/r/20240606125755.53778-2-i@eh5.me +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/pinctrl-rockchip.c | 8 +------- + 1 file changed, 1 insertion(+), 7 deletions(-) + +diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c +index fb7f2282635e8..5d14b77d65285 100644 +--- a/drivers/pinctrl/pinctrl-rockchip.c ++++ b/drivers/pinctrl/pinctrl-rockchip.c +@@ -662,12 +662,6 @@ static struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = { + + static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = { + { +- .num = 2, +- .pin = 12, +- .reg = 0x24, +- .bit = 8, +- .mask = 0x3 +- }, { + .num = 2, + .pin = 15, + .reg = 0x28, +@@ -3689,7 +3683,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = { + PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0), + PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0), + PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, +- IOMUX_WIDTH_3BIT, ++ 0, + IOMUX_WIDTH_3BIT, + 0), + PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", +-- +2.43.0 + diff --git a/queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio3-b-.patch b/queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio3-b-.patch new file mode 100644 index 00000000000..a0a784cc4b4 --- /dev/null +++ b/queue-4.19/pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio3-b-.patch @@ -0,0 +1,111 @@ +From f9a102515e95a443ed7796db1b27b526ea313013 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 20:57:53 +0800 +Subject: pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins + +From: Huang-Huang Bao + +[ Upstream commit 5ef6914e0bf578357b4c906ffe6b26e7eedb8ccf ] + +The pinmux bits for GPIO3-B1 to GPIO3-B6 pins are not explicitly +specified in RK3328 TRM, however we can get hint from pad name and its +correspinding IOMUX setting for pins in interface descriptions. The +correspinding IOMIX settings for these pins can be found in the same +row next to occurrences of following pad names in RK3328 TRM. + +GPIO3-B1: IO_TSPd5m0_CIFdata5m0_GPIO3B1vccio6 +GPIO3-B2: IO_TSPd6m0_CIFdata6m0_GPIO3B2vccio6 +GPIO3-B3: IO_TSPd7m0_CIFdata7m0_GPIO3B3vccio6 +GPIO3-B4: IO_CARDclkm0_GPIO3B4vccio6 +GPIO3-B5: IO_CARDrstm0_GPIO3B5vccio6 +GPIO3-B6: IO_CARDdetm0_GPIO3B6vccio6 + +Add pinmux data to rk3328_mux_recalced_data as mux register offset for +these pins does not follow rockchip convention. + +Signed-off-by: Huang-Huang Bao +Reviewed-by: Heiko Stuebner +Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") +Link: https://lore.kernel.org/r/20240606125755.53778-3-i@eh5.me +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/pinctrl-rockchip.c | 51 ++++++++++++++++++++++++++++++ + 1 file changed, 51 insertions(+) + +diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c +index 5d14b77d65285..849bd2f9dfd27 100644 +--- a/drivers/pinctrl/pinctrl-rockchip.c ++++ b/drivers/pinctrl/pinctrl-rockchip.c +@@ -662,17 +662,68 @@ static struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = { + + static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = { + { ++ /* gpio2_b7_sel */ + .num = 2, + .pin = 15, + .reg = 0x28, + .bit = 0, + .mask = 0x7 + }, { ++ /* gpio2_c7_sel */ + .num = 2, + .pin = 23, + .reg = 0x30, + .bit = 14, + .mask = 0x3 ++ }, { ++ /* gpio3_b1_sel */ ++ .num = 3, ++ .pin = 9, ++ .reg = 0x44, ++ .bit = 2, ++ .mask = 0x3 ++ }, { ++ /* gpio3_b2_sel */ ++ .num = 3, ++ .pin = 10, ++ .reg = 0x44, ++ .bit = 4, ++ .mask = 0x3 ++ }, { ++ /* gpio3_b3_sel */ ++ .num = 3, ++ .pin = 11, ++ .reg = 0x44, ++ .bit = 6, ++ .mask = 0x3 ++ }, { ++ /* gpio3_b4_sel */ ++ .num = 3, ++ .pin = 12, ++ .reg = 0x44, ++ .bit = 8, ++ .mask = 0x3 ++ }, { ++ /* gpio3_b5_sel */ ++ .num = 3, ++ .pin = 13, ++ .reg = 0x44, ++ .bit = 10, ++ .mask = 0x3 ++ }, { ++ /* gpio3_b6_sel */ ++ .num = 3, ++ .pin = 14, ++ .reg = 0x44, ++ .bit = 12, ++ .mask = 0x3 ++ }, { ++ /* gpio3_b7_sel */ ++ .num = 3, ++ .pin = 15, ++ .reg = 0x44, ++ .bit = 14, ++ .mask = 0x3 + }, + }; + +-- +2.43.0 + diff --git a/queue-4.19/pinctrl-rockchip-fix-pinmux-reset-in-rockchip_pmx_se.patch b/queue-4.19/pinctrl-rockchip-fix-pinmux-reset-in-rockchip_pmx_se.patch new file mode 100644 index 00000000000..ab9999a68d3 --- /dev/null +++ b/queue-4.19/pinctrl-rockchip-fix-pinmux-reset-in-rockchip_pmx_se.patch @@ -0,0 +1,42 @@ +From 81bc53d0ddab4b10dd1a21d0172130bfcad77ad1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 20:57:55 +0800 +Subject: pinctrl: rockchip: fix pinmux reset in rockchip_pmx_set + +From: Huang-Huang Bao + +[ Upstream commit 4ea4d4808e342ddf89ba24b93ffa2057005aaced ] + +rockchip_pmx_set reset all pinmuxs in group to 0 in the case of error, +add missing bank data retrieval in that code to avoid setting mux on +unexpected pins. + +Fixes: 14797189b35e ("pinctrl: rockchip: add return value to rockchip_set_mux") +Reviewed-by: Heiko Stuebner +Signed-off-by: Huang-Huang Bao +Link: https://lore.kernel.org/r/20240606125755.53778-5-i@eh5.me +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/pinctrl-rockchip.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c +index 849bd2f9dfd27..0dfb00919b9ba 100644 +--- a/drivers/pinctrl/pinctrl-rockchip.c ++++ b/drivers/pinctrl/pinctrl-rockchip.c +@@ -2203,8 +2203,10 @@ static int rockchip_pmx_set(struct pinctrl_dev *pctldev, unsigned selector, + + if (ret) { + /* revert the already done pin settings */ +- for (cnt--; cnt >= 0; cnt--) ++ for (cnt--; cnt >= 0; cnt--) { ++ bank = pin_to_bank(info, pins[cnt]); + rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); ++ } + + return ret; + } +-- +2.43.0 + diff --git a/queue-4.19/series b/queue-4.19/series index b930a8c3daf..5f8dff9921e 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -104,3 +104,7 @@ mm-memblock-replace-dereferences-of-memblock_region..patch x86-mm-numa-use-numa_no_node-when-calling-memblock_s.patch xhci-use-soft-retry-to-recover-faster-from-transacti.patch xhci-set-correct-transferred-length-for-cancelled-bu.patch +pinctrl-fix-deadlock-in-create_pinctrl-when-handling.patch +pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio2-b-.patch +pinctrl-rockchip-fix-pinmux-bits-for-rk3328-gpio3-b-.patch +pinctrl-rockchip-fix-pinmux-reset-in-rockchip_pmx_se.patch -- 2.47.3