]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
drm/i915/psr: Write DSC parameters on Selective Update in ET mode
authorJouni Högander <jouni.hogander@intel.com>
Wed, 4 Mar 2026 11:30:11 +0000 (13:30 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 25 Mar 2026 10:08:48 +0000 (11:08 +0100)
commit1ec7d3c7dc8f29617731fabfc54867f6d2889f2a
tree6651ae067de5f1bb525a53e36bd20ac0e74a9b0d
parent5329d725add8ae2dbb116ab1bb88f55d11d0ffaf
drm/i915/psr: Write DSC parameters on Selective Update in ET mode

commit 5923a6e0459fdd3edac4ad5abccb24d777d8f1b6 upstream.

There are slice row per frame and pic height parameters in DSC that needs
to be configured on every Selective Update in Early Transport mode. Use
helper provided by DSC code to configure these on Selective Update when in
Early Transport mode. Also fill crtc_state->psr2_su_area with full frame
area on full frame update for DSC calculation.

v2: move psr2_su_area under skip_sel_fetch_set_loop label

Bspec: 68927, 71709
Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Cc: <stable@vger.kernel.org> # v6.9+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20260304113011.626542-5-jouni.hogander@intel.com
(cherry picked from commit 3140af2fab505a4cd47d516284529bf1585628be)
Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/i915/display/intel_psr.c