]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/mips: add Octeon QMAC instructions
authorJames Hilliard <james.hilliard1@gmail.com>
Mon, 11 May 2026 18:22:55 +0000 (12:22 -0600)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 21 May 2026 06:20:58 +0000 (08:20 +0200)
commit710be4a71224f8cdecdd0dd69110a8099bc8a3e6
treeb3c4ab1c884e8d5dfc7e5b1f2d2d7c23976720d2
parent76f8ab8aeda5aabde1120a055b2647336275b171
target/mips: add Octeon QMAC instructions

QMAC.0x and QMACS.0x multiply the selected signed Q15 halfword lane from
rs by rt<15:0> and accumulate the Q31 product into the Octeon HI/LO
accumulator state.

QMAC updates the full 64-bit HI/LO accumulator. QMACS saturates the
32-bit Q31 result in LO and keeps HI<0> as the sticky saturation flag.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[PMD: Add min32/max32 in trans_QMACS()]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20260520172313.23777-24-philmd@linaro.org>
target/mips/tcg/octeon.decode
target/mips/tcg/octeon_translate.c