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mmc: zynq_sdhci: Fix UHS 1.8v switching with 5ms delay
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Mon, 30 Nov 2020 15:08:47 +0000 (08:08 -0700)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 2 Feb 2021 12:49:32 +0000 (13:49 +0100)
commit880b655d660ecfc8272430ff631740b35a3dfa2f
tree6abf728d1a15b0f60cab0f7a7d5dff858d41859ftree | snapshot
parenta9206dfc3b49631d51525ec453f444772a538ff9commit | diff
mmc: zynq_sdhci: Fix UHS 1.8v switching with 5ms delay

SD3.0 spec needs 5ms delay after host controller switches to 1.8v.
Remove the clock disable/enable logic from sdhci.c and add 5ms delay.

Return if clock is disabled from set_ios() so that we dont touch
anything else.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
State: pending
drivers/mmc/sdhci.c diff | blob | blame | history
drivers/mmc/zynq_sdhci.c diff | blob | blame | history
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