]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks
authorMika Kahola <mika.kahola@intel.com>
Thu, 12 Mar 2026 08:06:54 +0000 (08:06 +0000)
committerMika Kahola <mika.kahola@intel.com>
Tue, 24 Mar 2026 07:46:01 +0000 (09:46 +0200)
commita60d70847c5badbe624b0a6a175448ed4ad1073f
tree98764cb0d58055e8f3e8aa16a8dc6472d5593fdb
parentc071495ccd89955ca6c54608bd8d5dc31574ed0a
drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks

Add the PLL hooks for the TBT PLL on xe3plpd. These are simple stubs
similar to the TBT PLL on earlier platforms, since this PLL is always
on from the display POV - so no PLL enable/disable programming is
required as opposed to the non-TBT PLLs - and the clocks for different
link rates are enabled/disabled at a different level, via the
intel_encoder::enable_clock()/disable_clock() interface.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-22-mika.kahola@intel.com
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
drivers/gpu/drm/i915/display/intel_lt_phy.c
drivers/gpu/drm/i915/display/intel_lt_phy.h