Power PC Fix V bit error in 128-bit BCD add and subtract instructions

Power PC  Fix V bit error in 128-bit BCD add and subtract instructions

The original code was using the bcdadd / bcdsub instruction on the operand
shadow bits to calculate the shadow bits for the result.  This introduced
non-zero bits shadow bits in the result.   The shadow bits for these
instructions should be set to all valid or all invalid.  If one of the
argument shadow bits was one, then all of the shadow bits of the result should
be one.  Otherwise the result shadow bits should be zero.

This patch fixes the above bug in memcheck/mc_translate.c

Fixing the above bug broke the v-bit test.  The issue is the v-bit tester
assumes the shadow bits for the operands of a given Iop can be set to one
for testing purposes.  The implementation of the bcdadd and bcdsub was passing
a constant value for the variable ps.  The ps value is an argument to the
instruction that specifies how to set the sign code of the result.  The
implementation of the instructions was changed to issue the instruction with
ps=0.  Then the result of the instruction is updated in the VEX code if ps=1.
This changed also results in cleaning up the vbit test code.

This patch also fixes the issues with the v-bit test program.

Valgrind commit 3218

Bugzilla 360035

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15871