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author	Matthieu Longo <matthieu.longo@arm.com>
	Tue, 27 Feb 2024 10:59:16 +0000 (10:59 +0000)
committer	Richard Earnshaw <rearnsha@arm.com>
	Wed, 15 May 2024 09:36:24 +0000 (10:36 +0100)
commit	eb847ee117e5bc0229a62d70a454bbbcf49dd1fa
tree	de61298d7100f3a2f2781b6de68336319f1eee6b	tree \| snapshot
parent	f2f6a6c1574b483c1ce0d2681fa248322f78a004	commit \| diff

aarch64: testsuite: reorder write and read to match macro order

This patch aims at grouping write and read for a same system register
one after another so that the diff for the macro replacement does not
generate too much noise.

gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg-7.d		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg-7.s		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg-8.d		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg-8.s		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg.d		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg.s		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg128.d		diff \| blob \| blame \| history
gas/testsuite/gas/aarch64/sysreg/sysreg128.s		diff \| blob \| blame \| history

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