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(parent: 189208d) | patch
drm/amdgpu/mes12_1: fix the failure access to MID1 registers
authorJack Xiao <Jack.Xiao@amd.com>
Fri, 5 Dec 2025 08:45:41 +0000 (16:45 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 17 Mar 2026 14:31:16 +0000 (10:31 -0400)
commitf1d7a87634b3930d083eb955513abf765a8d1d6a
tree63f5cf03fd6dd4c23d26cd9453d8866e31120408tree | snapshot
parent189208d3d503090d95a39e85433bd608a0d84511commit | diff
drm/amdgpu/mes12_1: fix the failure access to MID1 registers

Correct the mid die id and mid1 register relative offset
for mes fw to access to mid1 registers.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c diff | blob | blame | history
drivers/gpu/drm/amd/amdgpu/soc_v1_0.c diff | blob | blame | history
drivers/gpu/drm/amd/amdgpu/soc_v1_0.h diff | blob | blame | history
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