staging: rtl8723bs: rename u1bTmp to val

Rename the variable u1bTmp to val to remove Hungarian notation. This
improves readability and aligns the code with kernel naming standards.

Signed-off-by: Luka Gejak <lukagejak5@gmail.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://patch.msgid.link/20260130185658.207785-3-lukagejak5@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
index c3bb7f2b976b5d8c6455182567f8e9236f26bc0c..babb83bc68f96dbc663ae66ce26240f6ccd63c7e 100644 (file)
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
@@ -259,7 +259,7 @@ exit:
 void rtl8723b_FirmwareSelfReset(struct adapter *padapter)
 {
        struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
-       u8 u1bTmp;
+       u8 val;
        u8 Delay = 100;
 
        if (
@@ -268,19 +268,19 @@ void rtl8723b_FirmwareSelfReset(struct adapter *padapter)
                /* 0x1cf = 0x20. Inform 8051 to reset. 2009.12.25. tynli_test */
                rtw_write8(padapter, REG_HMETFR+3, 0x20);
 
-               u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
-               while (u1bTmp & BIT2) {
+               val = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+               while (val & BIT2) {
                        Delay--;
                        if (Delay == 0)
                                break;
                        udelay(50);
-                       u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+                       val = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
                }
 
                if (Delay == 0) {
                        /* force firmware reset */
-                       u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
-                       rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
+                       val = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
+                       rtw_write8(padapter, REG_SYS_FUNC_EN+1, val&(~BIT2));
                }
        }
 }

diff --git a/drivers/staging/rtl8723bs/hal/sdio_halinit.c b/drivers/staging/rtl8723bs/hal/sdio_halinit.c
index a3940b61e1772740606c403eb959d85940bd9d01..909d08f8b8dfbcdb0293205ef397147d303dad43 100644 (file)
--- a/drivers/staging/rtl8723bs/hal/sdio_halinit.c
+++ b/drivers/staging/rtl8723bs/hal/sdio_halinit.c
@@ -589,7 +589,7 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
        struct hal_com_data *pHalData;
        struct pwrctrl_priv *pwrctrlpriv;
        u32 NavUpper = WiFiNavUpperUs;
-       u8 u1bTmp;
+       u8 val;
 
        pHalData = GET_HAL_DATA(padapter);
        pwrctrlpriv = adapter_to_pwrctl(padapter);
@@ -780,9 +780,9 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
        pHalData->SdioTxOQTMaxFreeSpace = pHalData->SdioTxOQTFreeSpace;
 
        /*  Enable MACTXEN/MACRXEN block */
-       u1bTmp = rtw_read8(padapter, REG_CR);
-       u1bTmp |= (MACTXEN | MACRXEN);
-       rtw_write8(padapter, REG_CR, u1bTmp);
+       val = rtw_read8(padapter, REG_CR);
+       val |= (MACTXEN | MACRXEN);
+       rtw_write8(padapter, REG_CR, val);
 
        rtw_hal_set_hwreg(padapter, HW_VAR_NAV_UPPER, (u8 *)&NavUpper);
 
@@ -848,7 +848,7 @@ u32 rtl8723bs_hal_init(struct adapter *padapter)
 /*  */
 static void CardDisableRTL8723BSdio(struct adapter *padapter)
 {
-       u8 u1bTmp;
+       u8 val;
        u8 bMacPwrCtrlOn;
 
        /*  Run LPS WL RFOFF flow */
@@ -856,26 +856,26 @@ static void CardDisableRTL8723BSdio(struct adapter *padapter)
 
        /*      ==== Reset digital sequence   ====== */
 
-       u1bTmp = rtw_read8(padapter, REG_MCUFWDL);
-       if ((u1bTmp & RAM_DL_SEL) && padapter->bFWReady) /* 8051 RAM code */
+       val = rtw_read8(padapter, REG_MCUFWDL);
+       if ((val & RAM_DL_SEL) && padapter->bFWReady) /* 8051 RAM code */
                rtl8723b_FirmwareSelfReset(padapter);
 
        /*  Reset MCU 0x2[10]= 0. Suggested by Filen. 2011.01.26. by tynli. */
-       u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
-       u1bTmp &= ~BIT(2);      /*  0x2[10], FEN_CPUEN */
-       rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp);
+       val = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
+       val &= ~BIT(2); /*  0x2[10], FEN_CPUEN */
+       rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val);
 
        /*  MCUFWDL 0x80[1:0]= 0 */
        /*  reset MCU ready status */
        rtw_write8(padapter, REG_MCUFWDL, 0);
 
        /*  Reset MCU IO Wrapper, added by Roger, 2011.08.30 */
-       u1bTmp = rtw_read8(padapter, REG_RSV_CTRL + 1);
-       u1bTmp &= ~BIT(0);
-       rtw_write8(padapter, REG_RSV_CTRL + 1, u1bTmp);
-       u1bTmp = rtw_read8(padapter, REG_RSV_CTRL + 1);
-       u1bTmp |= BIT(0);
-       rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp);
+       val = rtw_read8(padapter, REG_RSV_CTRL + 1);
+       val &= ~BIT(0);
+       rtw_write8(padapter, REG_RSV_CTRL + 1, val);
+       val = rtw_read8(padapter, REG_RSV_CTRL + 1);
+       val |= BIT(0);
+       rtw_write8(padapter, REG_RSV_CTRL+1, val);
 
        /*      ==== Reset digital sequence end ====== */