fpga: zynq: aes: Use flush_dcache_range() instead of cache on/off

Use flush_dcache_range() instead of dcache disable and
enable as its more meaningful to flush a region than
disabling cache and enabling it back. This fixes the
issue of GEM failure after using zynq aes.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 0482b85ea99e8b1b8b88c6f9a5fe4320925f8422..a0fa5b56e66515213fe1b8c633b430f3388f6081 100644 (file)
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -509,12 +509,19 @@ int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen,
        debug("%s: Source = 0x%08X\n", __func__, (u32)srcaddr);
        debug("%s: Size = %zu\n", __func__, srclen);
 
-       dcache_disable();
-       if (zynq_dma_transfer(srcaddr | 1, srclen, dstaddr | 1, dstlen)) {
-               dcache_enable();
+       /* flush(clean & invalidate) d-cache range buf */
+       flush_dcache_range((u32)srcaddr, (u32)srcaddr +
+                          roundup(srclen << 2, ARCH_DMA_MINALIGN));
+       /*
+        * Flush destination address range only if image is not
+        * bitstream.
+        */
+       if (bstype == BIT_NONE)
+               flush_dcache_range((u32)dstaddr, (u32)dstaddr +
+                                  roundup(dstlen << 2, ARCH_DMA_MINALIGN));
+
+       if (zynq_dma_transfer(srcaddr | 1, srclen, dstaddr | 1, dstlen))
                return FPGA_FAIL;
-       }
-       dcache_enable();
 
        return FPGA_SUCCESS;
 }