drm/amd/display: update dcn42 bounding box

[why]
update according hw spec.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42_soc_bb.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42_soc_bb.h
index c75778ea7a2c4c89b60c5db99932a062b5e17db1..deea5608c08eea27999936a99a1436b87569e482 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42_soc_bb.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn42_soc_bb.h
@@ -234,7 +234,7 @@ static const struct dml2_ip_capabilities dml2_dcn42_max_ip_caps = {
        .config_return_buffer_segment_size_in_kbytes = 64,
        .meta_fifo_size_in_kentries = 32,
        .compressed_buffer_segment_size_in_kbytes = 64,
-       .cursor_buffer_size = 24,
+       .cursor_buffer_size = 42,
        .max_flip_time_us = 110,
        .max_flip_time_lines = 50,
        .hostvm_mode = 0,

diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4.c
index fda01b0800d6752d31f052a833fd7a9b8997ced3..858e7bbc511f56636cb80d36b25c61ae26c09548 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4.c
@@ -135,7 +135,7 @@ struct dml2_core_ip_params core_dcn42_ip_caps_base = {
        .cursor_64bpp_support = true,
        .dynamic_metadata_vm_enabled = false,
 
-       .max_num_hdmi_frl_outputs = 0,
+       .max_num_hdmi_frl_outputs = 1,
        .max_num_dp2p0_outputs = 2,
        .max_num_dp2p0_streams = 4,
        .imall_supported = 1,
@@ -155,7 +155,7 @@ struct dml2_core_ip_params core_dcn42_ip_caps_base = {
        .min_meta_chunk_size_bytes = 256,
 
        .dchub_arb_to_ret_delay = 102,
-       .hostvm_mode = 1,
+       .hostvm_mode = 0,
 };
 
 static void patch_ip_caps_with_explicit_ip_params(struct dml2_ip_capabilities *ip_caps, const struct dml2_core_ip_params *ip_params)