]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
PCI: pci-bridge-emul: Set PCI_STATUS_CAP_LIST for PCIe device
authorPali Rohár <pali@kernel.org>
Wed, 24 Nov 2021 15:59:44 +0000 (16:59 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 08:19:50 +0000 (09:19 +0100)
commit 3be9d243b21724d49b65043d4520d688b6040b36 upstream.

Since all PCI Express device Functions are required to implement the PCI
Express Capability structure, Capabilities List bit in PCI Status Register
must be hardwired to 1b. Capabilities Pointer register (which is already
set by pci-bride-emul.c driver) is valid only when Capabilities List is set
to 1b.

Link: https://lore.kernel.org/r/20211124155944.1290-7-pali@kernel.org
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pci/pci-bridge-emul.c

index 16daf40ab5556a11f87ac329528f8301ceee4065..0ca3b5eef53a79c2d08a66a7a18d87fd736f195f 100644 (file)
@@ -287,6 +287,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
 
        if (bridge->has_pcie) {
                bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
+               bridge->conf.status |= cpu_to_le16(PCI_STATUS_CAP_LIST);
                bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
                bridge->pcie_conf.cap |= cpu_to_le16(PCI_EXP_TYPE_ROOT_PORT << 4);
                bridge->pcie_cap_regs_behavior =