--- /dev/null
+From 55877ef45fbd7f975d078426866b7d1a2435dcc3 Mon Sep 17 00:00:00 2001
+From: Sudeep Holla <sudeep.holla@arm.com>
+Date: Fri, 28 Oct 2016 09:45:29 +0100
+Subject: drivers: base: cacheinfo: fix boot error message when acpi is enabled
+
+From: Sudeep Holla <sudeep.holla@arm.com>
+
+commit 55877ef45fbd7f975d078426866b7d1a2435dcc3 upstream.
+
+ARM64 enables both CONFIG_OF and CONFIG_ACPI and the firmware can pass
+both ACPI tables and the device tree. Based on the kernel parameter, one
+of the two will be chosen. If acpi is enabled, then device tree is not
+unflattened.
+
+Currently ARM64 platforms report:
+"
+ Failed to find cpu0 device node
+ Unable to detect cache hierarchy from DT for CPU 0
+"
+which is incorrect when booting with ACPI. Also latest ACPI v6.1 has no
+support for cache properties/hierarchy.
+
+This patch adds check for unflattened device tree and also returns as
+"not supported" if ACPI is runtime enabled.
+
+It also removes the reference to DT from the error message as the cache
+hierarchy can be detected from the firmware(OF/DT/ACPI)
+
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/base/cacheinfo.c | 12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+--- a/drivers/base/cacheinfo.c
++++ b/drivers/base/cacheinfo.c
+@@ -16,6 +16,7 @@
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
++#include <linux/acpi.h>
+ #include <linux/bitops.h>
+ #include <linux/cacheinfo.h>
+ #include <linux/compiler.h>
+@@ -104,12 +105,16 @@ static int cache_shared_cpu_map_setup(un
+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
+ struct cacheinfo *this_leaf, *sib_leaf;
+ unsigned int index;
+- int ret;
++ int ret = 0;
+
+ if (this_cpu_ci->cpu_map_populated)
+ return 0;
+
+- ret = cache_setup_of_node(cpu);
++ if (of_have_populated_dt())
++ ret = cache_setup_of_node(cpu);
++ else if (!acpi_disabled)
++ /* No cache property/hierarchy support yet in ACPI */
++ ret = -ENOTSUPP;
+ if (ret)
+ return ret;
+
+@@ -206,8 +211,7 @@ static int detect_cache_attributes(unsig
+ */
+ ret = cache_shared_cpu_map_setup(cpu);
+ if (ret) {
+- pr_warn("Unable to detect cache hierarchy from DT for CPU %d\n",
+- cpu);
++ pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
+ goto free_ci;
+ }
+ return 0;
--- /dev/null
+From fac51482577d5e05bbb0efa8d602a3c2111098bf Mon Sep 17 00:00:00 2001
+From: Sudeep Holla <sudeep.holla@arm.com>
+Date: Fri, 28 Oct 2016 09:45:28 +0100
+Subject: drivers: base: cacheinfo: fix x86 with CONFIG_OF enabled
+
+From: Sudeep Holla <sudeep.holla@arm.com>
+
+commit fac51482577d5e05bbb0efa8d602a3c2111098bf upstream.
+
+With CONFIG_OF enabled on x86, we get the following error on boot:
+"
+ Failed to find cpu0 device node
+ Unable to detect cache hierarchy from DT for CPU 0
+"
+and the cacheinfo fails to get populated in the corresponding sysfs
+entries. This is because cache_setup_of_node looks for of_node for
+setting up the shared cpu_map without checking that it's already
+populated in the architecture specific callback.
+
+In order to indicate that the shared cpu_map is already populated, this
+patch introduces a boolean `cpu_map_populated` in struct cpu_cacheinfo
+that can be used by the generic code to skip cache_shared_cpu_map_setup.
+
+This patch also sets that boolean for x86.
+
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
+Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/intel_cacheinfo.c | 2 ++
+ drivers/base/cacheinfo.c | 3 +++
+ include/linux/cacheinfo.h | 1 +
+ 3 files changed, 6 insertions(+)
+
+--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
++++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
+@@ -934,6 +934,8 @@ static int __populate_cache_leaves(unsig
+ ci_leaf_init(this_leaf++, &id4_regs);
+ __cache_cpumap_setup(cpu, idx, &id4_regs);
+ }
++ this_cpu_ci->cpu_map_populated = true;
++
+ return 0;
+ }
+
+--- a/drivers/base/cacheinfo.c
++++ b/drivers/base/cacheinfo.c
+@@ -106,6 +106,9 @@ static int cache_shared_cpu_map_setup(un
+ unsigned int index;
+ int ret;
+
++ if (this_cpu_ci->cpu_map_populated)
++ return 0;
++
+ ret = cache_setup_of_node(cpu);
+ if (ret)
+ return ret;
+--- a/include/linux/cacheinfo.h
++++ b/include/linux/cacheinfo.h
+@@ -71,6 +71,7 @@ struct cpu_cacheinfo {
+ struct cacheinfo *info_list;
+ unsigned int num_levels;
+ unsigned int num_leaves;
++ bool cpu_map_populated;
+ };
+
+ /*
--- /dev/null
+From 88d879d29f9cc0de2d930b584285638cdada6625 Mon Sep 17 00:00:00 2001
+From: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
+Date: Tue, 25 Apr 2017 16:44:03 -0500
+Subject: Prevent timer value 0 for MWAITX
+
+From: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
+
+commit 88d879d29f9cc0de2d930b584285638cdada6625 upstream.
+
+Newer hardware has uncovered a bug in the software implementation of
+using MWAITX for the delay function. A value of 0 for the timer is meant
+to indicate that a timeout will not be used to exit MWAITX. On newer
+hardware this can result in MWAITX never returning, resulting in NMI
+soft lockup messages being printed. On older hardware, some of the other
+conditions under which MWAITX can exit masked this issue. The AMD APM
+does not currently document this and will be updated.
+
+Please refer to http://marc.info/?l=kvm&m=148950623231140 for
+information regarding NMI soft lockup messages on an AMD Ryzen 1800X.
+This has been root-caused as a 0 passed to MWAITX causing it to wait
+indefinitely.
+
+This change has the added benefit of avoiding the unnecessary setup of
+MONITORX/MWAITX when the delay value is zero.
+
+Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
+Link: http://lkml.kernel.org/r/1493156643-29366-1-git-send-email-Janakarajan.Natarajan@amd.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/lib/delay.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/x86/lib/delay.c
++++ b/arch/x86/lib/delay.c
+@@ -93,6 +93,13 @@ static void delay_mwaitx(unsigned long _
+ {
+ u64 start, end, delay, loops = __loops;
+
++ /*
++ * Timer value of 0 causes MWAITX to wait indefinitely, unless there
++ * is a store on the memory monitored by MONITORX.
++ */
++ if (loops == 0)
++ return;
++
+ start = rdtsc_ordered();
+
+ for (;;) {
can-af_can-can_rcv-replace-warn_once-by-pr_warn_once.patch
can-af_can-canfd_rcv-replace-warn_once-by-pr_warn_once.patch
kvm-arm-arm64-check-pagesize-when-allocating-a-hugepage-at-stage-2.patch
+prevent-timer-value-0-for-mwaitx.patch
+drivers-base-cacheinfo-fix-x86-with-config_of-enabled.patch
+drivers-base-cacheinfo-fix-boot-error-message-when-acpi-is-enabled.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
