x86/microcode: Fix comment in microcode_loader_disabled()

The code in microcode_loader_disabled() actually checks for the bit 31
in CPUID[1]:ECX being set. Update the comment to match the code.

No functional change intended.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://patch.msgid.link/20260512152754.671760-1-xiaoyao.li@intel.com

diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 651202e6fefbe4df4ff262b54157d09b1630b64f..68a1a893246c2a0e4f5e290099e548e242ccc3ab 100644 (file)
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -126,7 +126,7 @@ bool __init microcode_loader_disabled(void)
        }
 
        /*
-        * 2) Bit 31 in CPUID[1]:ECX is clear
+        * 2) Bit 31 in CPUID[1]:ECX is set
         *    The bit is reserved for hypervisor use. This is still not
         *    completely accurate as XEN PV guests don't see that CPUID bit
         *    set, but that's good enough as they don't land on the BSP