drm/i915/dp: Factor out intel_dp_dsc_min_slice_count()

Factor out intel_dp_dsc_min_slice_count() for making
intel_dp_dsc_get_slice_count() more readable and also to prepare for a
follow-up change unifying the eDP and DP slice count/config computation.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-8-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3a12156cd6e5656df92525d8d124b3d5fccf53f2..4455d0a2e59cbb138994257bfc6720640df6a0e4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -959,14 +959,11 @@ u32 get_max_compressed_bpp_with_joiner(struct intel_display *display,
        return max_bpp;
 }
 
-u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
-                               int mode_clock, int mode_hdisplay,
-                               int num_joined_pipes)
+static int intel_dp_dsc_min_slice_count(const struct intel_connector *connector,
+                                       int mode_clock, int mode_hdisplay)
 {
        struct intel_display *display = to_intel_display(connector);
-       u32 sink_slice_count_mask =
-               drm_dp_dsc_sink_slice_count_mask(connector->dp.dsc_dpcd, false);
-       u8 min_slice_count, i;
+       u8 min_slice_count;
        int max_slice_width;
        int tp_rgb_yuv444;
        int tp_yuv422_420;
@@ -1025,6 +1022,20 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
                                DIV_ROUND_UP(mode_hdisplay,
                                             max_slice_width));
 
+       return min_slice_count;
+}
+
+u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
+                               int mode_clock, int mode_hdisplay,
+                               int num_joined_pipes)
+{
+       struct intel_display *display = to_intel_display(connector);
+       int min_slice_count =
+               intel_dp_dsc_min_slice_count(connector, mode_clock, mode_hdisplay);
+       u32 sink_slice_count_mask =
+               drm_dp_dsc_sink_slice_count_mask(connector->dp.dsc_dpcd, false);
+       int i;
+
        /* Find the closest match to the valid slice count values */
        for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
                u8 test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes;