]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/dp: Move num_joined_pipes and related checks together
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Mon, 2 Feb 2026 10:37:16 +0000 (16:07 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Tue, 3 Feb 2026 08:17:01 +0000 (13:47 +0530)
Move the calculation of `num_joined_pipes` and other constraints that
depend on it, into a single block.
This groups all joiner-dependent logic together, preparing the code for a
future loop-based evaluation of multiple joiner configurations.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260202103731.357416-3-ankit.k.nautiyal@intel.com
drivers/gpu/drm/i915/display/intel_dp.c

index fe9f8392ca8fe531bb86fa53829abccc980510d9..fee95eea6757fdd62197c636297b5ada9462c53e 100644 (file)
@@ -1472,20 +1472,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
                target_clock = fixed_mode->clock;
        }
 
-       num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-                                                    mode->hdisplay, target_clock);
-       max_dotclk *= num_joined_pipes;
-
        sink_format = intel_dp_sink_format(connector, mode);
        output_format = intel_dp_output_format(connector, sink_format);
 
-       status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
-       if (status != MODE_OK)
-               return status;
-
-       if (target_clock > max_dotclk)
-               return MODE_CLOCK_HIGH;
-
        max_link_clock = intel_dp_max_link_rate(intel_dp);
        max_lanes = intel_dp_max_lane_count(intel_dp);
 
@@ -1496,6 +1485,17 @@ intel_dp_mode_valid(struct drm_connector *_connector,
                                           target_clock, mode->hdisplay,
                                           link_bpp_x16, 0);
 
+       num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
+                                                    mode->hdisplay, target_clock);
+       max_dotclk *= num_joined_pipes;
+
+       if (target_clock > max_dotclk)
+               return MODE_CLOCK_HIGH;
+
+       status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
+       if (status != MODE_OK)
+               return status;
+
        if (intel_dp_has_dsc(connector)) {
                int pipe_bpp;
 
@@ -1538,14 +1538,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
        if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
                return MODE_CLOCK_HIGH;
 
-       if (mode_rate > max_rate && !dsc)
-               return MODE_CLOCK_HIGH;
-
-       status = intel_dp_mode_valid_downstream(connector, mode, target_clock);
+       status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
        if (status != MODE_OK)
                return status;
 
-       return intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
+       if (mode_rate > max_rate && !dsc)
+               return MODE_CLOCK_HIGH;
+
+       return intel_dp_mode_valid_downstream(connector, mode, target_clock);
 }
 
 bool intel_dp_source_supports_tps3(struct intel_display *display)