octeontx2-af: npc: Fix CPT channel mask in npc_install_flow

Use the CPT-aware NIX channel mask in the npc_install_flow path so that
when the host PF installs steering rules in kernel for a VF used from
userspace (e.g. DPDK), MCAM entries see the same channel mask semantics as
other RX paths.

Fixes: 56bcef528bd8 ("octeontx2-af: Use npc_install_flow API for promisc and broadcast entries")
Cc: Naveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
Link: https://patch.msgid.link/20260602045853.1558530-1-rkannoth@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index de3fbd3d15d607a659d844fffe05adaa267de2e1..65397daae4c2fca88cbb01cb07a59cc7f723ca19 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -1145,6 +1145,7 @@ int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf,
                        int slot);
 int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc);
 int rvu_cpt_init(struct rvu *rvu);
+u32 rvu_get_cpt_chan_mask(struct rvu *rvu);
 
 #define NDC_AF_BANK_MASK       GENMASK_ULL(7, 0)
 #define NDC_AF_BANK_LINE_MASK  GENMASK_ULL(31, 16)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 6bbda0593fcd7550d6ea784486b52034c347d014..d301a3f0f87a86d277f16d6662cf53095523f656 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -701,6 +701,19 @@ void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
        return rvu_write64(rvu, blkaddr, reg, cfg);
 }
 
+u32 rvu_get_cpt_chan_mask(struct rvu *rvu)
+{
+       /* For cn10k the upper two bits of the channel number are
+        * cpt channel number. with masking out these bits in the
+        * mcam entry, same entry used for NIX will allow packets
+        * received from cpt for parsing.
+        */
+       if (!is_rvu_otx2(rvu))
+               return NIX_CHAN_CPT_X2P_MASK;
+       else
+               return 0xFFFu;
+}
+
 void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
                                 int nixlf, u64 chan, u8 *mac_addr)
 {
@@ -750,7 +763,7 @@ void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
        eth_broadcast_addr((u8 *)&req.mask.dmac);
        req.features = BIT_ULL(NPC_DMAC);
        req.channel = chan;
-       req.chan_mask = 0xFFFU;
+       req.chan_mask = rvu_get_cpt_chan_mask(rvu);
        req.intf = pfvf->nix_rx_intf;
        req.op = action.op;
        req.hdr.pcifunc = 0; /* AF is requester */
@@ -845,11 +858,7 @@ void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,
         * mcam entry, same entry used for NIX will allow packets
         * received from cpt for parsing.
         */
-       if (!is_rvu_otx2(rvu)) {
-               req.chan_mask = NIX_CHAN_CPT_X2P_MASK;
-       } else {
-               req.chan_mask = 0xFFFU;
-       }
+       req.chan_mask = rvu_get_cpt_chan_mask(rvu);
 
        if (chan_cnt > 1) {
                if (!is_power_of_2(chan_cnt)) {
@@ -1053,16 +1062,7 @@ void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
        ether_addr_copy(req.mask.dmac, mac_addr);
        req.features = BIT_ULL(NPC_DMAC);
 
-       /* For cn10k the upper two bits of the channel number are
-        * cpt channel number. with masking out these bits in the
-        * mcam entry, same entry used for NIX will allow packets
-        * received from cpt for parsing.
-        */
-       if (!is_rvu_otx2(rvu))
-               req.chan_mask = NIX_CHAN_CPT_X2P_MASK;
-       else
-               req.chan_mask = 0xFFFU;
-
+       req.chan_mask = rvu_get_cpt_chan_mask(rvu);
        req.channel = chan;
        req.intf = pfvf->nix_rx_intf;
        req.entry = index;

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
index 6ae9cdcb608b0c8db0da9b4846168560720db049..34f1e066707bdc77c1d1437dd329319b1eaf4f3c 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
@@ -1820,7 +1820,7 @@ process_flow:
 
        /* ignore chan_mask in case pf func is not AF, revisit later */
        if (!is_pffunc_af(req->hdr.pcifunc))
-               req->chan_mask = 0xFFF;
+               req->chan_mask = rvu_get_cpt_chan_mask(rvu);
 
        err = npc_check_unsupported_flows(rvu, req->features, req->intf);
        if (err) {