thermal: intel: int340x: Fix potential shift overflow in ptc_mmio_write()

The value parameter is u32 but is shifted into a u64 register value
without casting first. If the shift amount pushes bits beyond 32, they
are lost. Cast value to u64 before shifting to ensure all bits are
preserved.

Signed-off-by: Aravind Anilraj <aravindanilraj0702@gmail.com>
Link: https://patch.msgid.link/20260329070642.10721-2-aravindanilraj0702@gmail.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c b/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c
index 0ccc72c93499a5a6bdc0cf503897b34b8082c095..18ac5014d8dc2eb52651e4a88e41ec241e857113 100644 (file)
--- a/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c
+++ b/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c
@@ -138,7 +138,7 @@ static void ptc_mmio_write(struct pci_dev *pdev, u32 offset, int index, u32 valu
 
        reg_val = readq((void __iomem *) (proc_priv->mmio_base + offset));
        reg_val &= ~mask;
-       reg_val |= (value << ptc_mmio_regs[index].shift);
+       reg_val |= ((u64)value << ptc_mmio_regs[index].shift);
        writeq(reg_val, (void __iomem *) (proc_priv->mmio_base + offset));
 }