clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC

This GDSC requires an interconnect path to be enabled, otherwise the
GDSC will be stuck on 'off' and can't be enabled.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260501-milos-camcc-icc-v2-4-bb83c1256cc3@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/camcc-milos.c b/drivers/clk/qcom/camcc-milos.c
index 409d47098c109e69ae5d14904172db01eecf9b1a..579b71e0e08923e640fcb00d10e4d5b1c604dd05 100644 (file)
--- a/drivers/clk/qcom/camcc-milos.c
+++ b/drivers/clk/qcom/camcc-milos.c
@@ -30,6 +30,11 @@ enum {
        DT_IFACE,
 };
 
+/* Need to match the order of interconnects in DT binding */
+enum {
+       DT_ICC_TOP_GDSC,
+};
+
 enum {
        P_BI_TCXO,
        P_CAM_CC_PLL0_OUT_EVEN,
@@ -1971,6 +1976,8 @@ static struct gdsc cam_cc_camss_top_gdsc = {
        },
        .pwrsts = PWRSTS_OFF_ON,
        .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
+       .needs_icc = true,
+       .icc_path_index = DT_ICC_TOP_GDSC,
 };
 
 static struct clk_regmap *cam_cc_milos_clocks[] = {