]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c
authorUma Shankar <uma.shankar@intel.com>
Thu, 5 Feb 2026 09:43:34 +0000 (15:13 +0530)
committerUma Shankar <uma.shankar@intel.com>
Thu, 12 Feb 2026 10:00:53 +0000 (15:30 +0530)
Move TRANS_CHICKEN1 reg to display header to make g4x_hdmi.c
free from i915_reg.h dependency.

v2: Remove from common header in include and use display_regs.h (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-14-uma.shankar@intel.com
drivers/gpu/drm/i915/display/g4x_hdmi.c
drivers/gpu/drm/i915/display/intel_display_regs.h
drivers/gpu/drm/i915/i915_reg.h

index 8b22447e8e234b78042f8fd3be4803d969189e2e..5fe5067c4237c01d7640661ec8ea6f5a95460c0f 100644 (file)
@@ -8,7 +8,6 @@
 #include <drm/drm_print.h>
 
 #include "g4x_hdmi.h"
-#include "i915_reg.h"
 #include "intel_atomic.h"
 #include "intel_audio.h"
 #include "intel_connector.h"
index 9f241655aa9916b62eaaeea9ff43893e5791b1da..d4c5fd975b1b2ae7e727e0a4b4b1a969c4072c6b 100644 (file)
 #define  TRANS_BPC_6                   REG_FIELD_PREP(TRANS_BPC_MASK, 2)
 #define  TRANS_BPC_12                  REG_FIELD_PREP(TRANS_BPC_MASK, 3)
 
+/* Icelake PPS_DATA and _ECC DIP Registers.
+ * These are available for transcoders B,C and eDP.
+ * Adding the _A so as to reuse the _MMIO_TRANS2
+ * definition, with which it offsets to the right location.
+ */
+
+#define _TRANSA_CHICKEN1        0xf0060
+#define _TRANSB_CHICKEN1        0xf1060
+#define TRANS_CHICKEN1(pipe)   _MMIO_PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)
+#define   TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE   REG_BIT(10)
+#define   TRANS_CHICKEN1_DP0UNIT_GC_DISABLE    REG_BIT(4)
+
 #define _TRANSA_CHICKEN2       0xf0064
 #define _TRANSB_CHICKEN2       0xf1064
 #define TRANS_CHICKEN2(pipe)   _MMIO_PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
index 2bac216bd2b92971649bc88134566d521009e244..2c279bd3342dcf75b4340a1cbd9e301ebde7e0a4 100644 (file)
 #define   DDI_CLOCK_REG_ACCESS                 REG_BIT(7)
 
 
-/* Icelake PPS_DATA and _ECC DIP Registers.
- * These are available for transcoders B,C and eDP.
- * Adding the _A so as to reuse the _MMIO_TRANS2
- * definition, with which it offsets to the right location.
- */
-
-#define _TRANSA_CHICKEN1        0xf0060
-#define _TRANSB_CHICKEN1        0xf1060
-#define TRANS_CHICKEN1(pipe)   _MMIO_PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)
-#define   TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE   REG_BIT(10)
-#define   TRANS_CHICKEN1_DP0UNIT_GC_DISABLE    REG_BIT(4)
-
 #define  VLV_PMWGICZ                           _MMIO(0x1300a4)
 
 #define  HSW_EDRAM_CAP                         _MMIO(0x120010)