]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/power: Remove i915_power_well_desc::has_vga
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 8 Dec 2025 18:26:21 +0000 (20:26 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 23 Jan 2026 02:36:41 +0000 (04:36 +0200)
We no longer have any need for the has_vga flag in the
display power well descriptor. Get rid of it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251208182637.334-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display_power_map.c
drivers/gpu/drm/i915/display/intel_display_power_well.c
drivers/gpu/drm/i915/display/intel_display_power_well.h

index 9b49952994ceafbcea848a70fc6f192061e868d8..638d971a3a6c68b05eca4baefecc0da018e2c66b 100644 (file)
@@ -112,7 +112,6 @@ static const struct i915_power_well_desc hsw_power_wells_main[] = {
                                .id = HSW_DISP_PW_GLOBAL),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
        },
 };
 
@@ -146,7 +145,6 @@ static const struct i915_power_well_desc bdw_power_wells_main[] = {
                                .id = HSW_DISP_PW_GLOBAL),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
        },
 };
@@ -390,7 +388,6 @@ static const struct i915_power_well_desc skl_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
                .has_fuses = true,
        }, {
@@ -469,7 +466,6 @@ static const struct i915_power_well_desc bxt_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
                .has_fuses = true,
        }, {
@@ -572,7 +568,6 @@ static const struct i915_power_well_desc glk_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
                .has_fuses = true,
        }, {
@@ -748,7 +743,6 @@ static const struct i915_power_well_desc icl_power_wells_main[] = {
                                .id = ICL_DISP_PW_3),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .irq_pipe_mask = BIT(PIPE_B),
                .has_fuses = true,
        }, {
@@ -914,7 +908,6 @@ static const struct i915_power_well_desc tgl_power_wells_main[] = {
                                .id = ICL_DISP_PW_3),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .irq_pipe_mask = BIT(PIPE_B),
                .has_fuses = true,
        }, {
@@ -1071,7 +1064,6 @@ static const struct i915_power_well_desc rkl_power_wells_main[] = {
                ),
                .ops = &hsw_power_well_ops,
                .irq_pipe_mask = BIT(PIPE_B),
-               .has_vga = true,
                .has_fuses = true,
        }, {
                .instances = &I915_PW_INSTANCES(
@@ -1166,7 +1158,6 @@ static const struct i915_power_well_desc dg1_power_wells_main[] = {
                ),
                .ops = &hsw_power_well_ops,
                .irq_pipe_mask = BIT(PIPE_B),
-               .has_vga = true,
                .has_fuses = true,
        }, {
                .instances = &I915_PW_INSTANCES(
@@ -1325,7 +1316,6 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .has_fuses = true,
        }, {
                .instances = &I915_PW_INSTANCES(
@@ -1482,7 +1472,6 @@ static const struct i915_power_well_desc xelpdp_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .has_fuses = true,
        }, {
                .instances = &I915_PW_INSTANCES(
@@ -1649,7 +1638,6 @@ static const struct i915_power_well_desc xe3lpd_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .has_fuses = true,
        }, {
                .instances = &I915_PW_INSTANCES(
@@ -1722,7 +1710,6 @@ static const struct i915_power_well_desc wcl_power_wells_main[] = {
                                .id = SKL_DISP_PW_2),
                ),
                .ops = &hsw_power_well_ops,
-               .has_vga = true,
                .has_fuses = true,
        }, {
                .instances = &I915_PW_INSTANCES(
index 52b20118ace6c69b83567c8339041a89b60b8716..68f293c3ac0102c11a53d931b92d67b2918272c0 100644 (file)
@@ -202,7 +202,7 @@ int intel_power_well_refcount(struct i915_power_well *power_well)
  * requesting it to be enabled.
  */
 static void hsw_power_well_post_enable(struct intel_display *display,
-                                      u8 irq_pipe_mask, bool has_vga)
+                                      u8 irq_pipe_mask)
 {
        if (irq_pipe_mask)
                gen8_irq_power_well_post_enable(display, irq_pipe_mask);
@@ -415,8 +415,7 @@ static void hsw_power_well_enable(struct intel_display *display,
        }
 
        hsw_power_well_post_enable(display,
-                                  power_well->desc->irq_pipe_mask,
-                                  power_well->desc->has_vga);
+                                  power_well->desc->irq_pipe_mask);
 }
 
 static void hsw_power_well_disable(struct intel_display *display,
index ec8e508d0593dfa966dfeb7a677e00123c970b7d..8f5524da2d0613581ddaf22fe5a3fb84c3268f3e 100644 (file)
@@ -103,8 +103,6 @@ struct i915_power_well_desc {
         * the well enabled.
         */
        u16 fixed_enable_delay:1;
-       /* The pw is backing the VGA functionality */
-       u16 has_vga:1;
        u16 has_fuses:1;
        /*
         * The pw is for an ICL+ TypeC PHY port in