]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/msm/adreno: fix userspace-triggered crash on a2xx-a4xx
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Sat, 11 Apr 2026 14:59:15 +0000 (17:59 +0300)
committerRob Clark <robin.clark@oss.qualcomm.com>
Wed, 13 May 2026 21:37:53 +0000 (14:37 -0700)
Before a5xx Adreno driver will not try fetching UBWC params (because
those generations didn't support UBWC anyway), however it's still
possible to query UBWC-related params from the userspace, triggering
possible NULL pointer dereference. Check for UBWC config in
adreno_get_param() and return sane defaults if there is none.

Fixes: a452510aad53 ("drm/msm/adreno: Switch to the common UBWC config struct")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Rob Clark <rob.clark@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/717778/
Message-ID: <20260411-adreno-fix-ubwc-v3-1-4983156f3f80@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
drivers/gpu/drm/msm/adreno/adreno_gpu.c

index a812a4590cc03fa14fa5d8895a666f94578ab673..03f96a1154e1c7d4f999efbf9281f30155ee7b43 100644 (file)
@@ -424,15 +424,21 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
                *value = vm->mm_range;
                return 0;
        case MSM_PARAM_HIGHEST_BANK_BIT:
+               if (!adreno_gpu->ubwc_config)
+                       return UERR(ENOENT, drm, "no UBWC on this platform");
                *value = adreno_gpu->ubwc_config->highest_bank_bit;
                return 0;
        case MSM_PARAM_RAYTRACING:
                *value = adreno_gpu->has_ray_tracing;
                return 0;
        case MSM_PARAM_UBWC_SWIZZLE:
+               if (!adreno_gpu->ubwc_config)
+                       return UERR(ENOENT, drm, "no UBWC on this platform");
                *value = adreno_gpu->ubwc_config->ubwc_swizzle;
                return 0;
        case MSM_PARAM_MACROTILE_MODE:
+               if (!adreno_gpu->ubwc_config)
+                       return UERR(ENOENT, drm, "no UBWC on this platform");
                *value = adreno_gpu->ubwc_config->macrotile_mode;
                return 0;
        case MSM_PARAM_UCHE_TRAP_BASE: