drm/i915/dsc: Track the DSC stream count in the DSC slice config state

Move the tracking for the DSC stream count from
intel_crtc_state::dsc.num_streams to
intel_crtc_state::dsc.slice_config.streams_per_pipe.

While at it add a TODO comment to read out the full DSC configuration
from HW including the pipes-per-line and slices-per-stream values.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-3-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index dac781f546617b1e69f3186b9ad002c817323e43..5b64e8d6e8382dea60f7139157ff22f775559ef0 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1626,9 +1626,9 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
 
        /* FIXME: split only when necessary */
        if (crtc_state->dsc.slice_count > 1)
-               crtc_state->dsc.num_streams = 2;
+               crtc_state->dsc.slice_config.streams_per_pipe = 2;
        else
-               crtc_state->dsc.num_streams = 1;
+               crtc_state->dsc.slice_config.streams_per_pipe = 1;
 
        /* FIXME: initialize from VBT */
        vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 81b3a6692ca20198ed4460af25a61b2d48e76023..7491e00e385854bde3eb176282e05259cf95b7a3 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5459,7 +5459,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
        PIPE_CONF_CHECK_I(dsc.config.nsl_bpg_offset);
 
        PIPE_CONF_CHECK_BOOL(dsc.compression_enable);
-       PIPE_CONF_CHECK_I(dsc.num_streams);
+       PIPE_CONF_CHECK_I(dsc.slice_config.streams_per_pipe);
        PIPE_CONF_CHECK_I(dsc.compressed_bpp_x16);
 
        PIPE_CONF_CHECK_BOOL(splitter.enable);

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 7d1654f600946966678ad792f3815fd13d0a565e..f223cabb185aed5d98b76dbb3859bf00de9d2398 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1332,7 +1332,6 @@ struct intel_crtc_state {
                /* Only used for state computation, not read out from the HW. */
                bool compression_enabled_on_link;
                bool compression_enable;
-               int num_streams;
                struct intel_dsc_slice_config {
                        int pipes_per_line;
                        int streams_per_pipe;

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7e022c47e8ac2e0d23225d9264bd9b460c9adb51..396c25d15af5dabe4aa459976f28b167fb870fcd 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2418,11 +2418,11 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
         */
        if (pipe_config->joiner_pipes && num_joined_pipes == 4 &&
            pipe_config->dsc.slice_count == 12)
-               pipe_config->dsc.num_streams = 3;
+               pipe_config->dsc.slice_config.streams_per_pipe = 3;
        else if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1)
-               pipe_config->dsc.num_streams = 2;
+               pipe_config->dsc.slice_config.streams_per_pipe = 2;
        else
-               pipe_config->dsc.num_streams = 1;
+               pipe_config->dsc.slice_config.streams_per_pipe = 1;
 
        ret = intel_dp_dsc_compute_params(connector, pipe_config);
        if (ret < 0) {

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index f8e4b2aa6c176c21944b856ad73ec1ea6a8ab33b..4a3d505338cb9c4f11dd2436d811574ea6d6a98b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -421,7 +421,7 @@ intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 
 static int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state)
 {
-       return crtc_state->dsc.num_streams;
+       return crtc_state->dsc.slice_config.streams_per_pipe;
 }
 
 int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state)
@@ -1023,12 +1023,13 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
        if (!crtc_state->dsc.compression_enable)
                goto out;
 
+       /* TODO: Read out slice_config.pipes_per_line/slices_per_stream as well */
        if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & (VDSC2_ENABLE | SMALL_JOINER_CONFIG_3_ENGINES))
-               crtc_state->dsc.num_streams = 3;
+               crtc_state->dsc.slice_config.streams_per_pipe = 3;
        else if (dss_ctl1 & JOINER_ENABLE && dss_ctl2 & VDSC1_ENABLE)
-               crtc_state->dsc.num_streams = 2;
+               crtc_state->dsc.slice_config.streams_per_pipe = 2;
        else
-               crtc_state->dsc.num_streams = 1;
+               crtc_state->dsc.slice_config.streams_per_pipe = 1;
 
        intel_dsc_get_pps_config(crtc_state);
 out:
@@ -1042,7 +1043,7 @@ static void intel_vdsc_dump_state(struct drm_printer *p, int indent,
                          "dsc-dss: compressed-bpp:" FXP_Q4_FMT ", slice-count: %d, num_streams: %d\n",
                          FXP_Q4_ARGS(crtc_state->dsc.compressed_bpp_x16),
                          crtc_state->dsc.slice_count,
-                         crtc_state->dsc.num_streams);
+                         crtc_state->dsc.slice_config.streams_per_pipe);
 }
 
 void intel_vdsc_state_dump(struct drm_printer *p, int indent,