]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: cputype: Add C1-Pro definitions
authorCatalin Marinas <catalin.marinas@arm.com>
Tue, 7 Apr 2026 10:28:43 +0000 (11:28 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 10 Apr 2026 18:46:14 +0000 (19:46 +0100)
Add cputype definitions for C1-Pro. These will be used for errata
detection in subsequent patches.

These values can be found in "Table A-303: MIDR_EL1 bit descriptions" in
issue 07 of the C1-Pro TRM:

  https://documentation-service.arm.com/static/6930126730f8f55a656570af

Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: James Morse <james.morse@arm.com>
Reviewed-by: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/cputype.h

index 08860d482e60009ff0ca0679a295770becded17c..7b518e81dd15bf65c525e2dd1e4fd8dba7a5de04 100644 (file)
@@ -98,6 +98,7 @@
 #define ARM_CPU_PART_CORTEX_A725       0xD87
 #define ARM_CPU_PART_CORTEX_A720AE     0xD89
 #define ARM_CPU_PART_NEOVERSE_N3       0xD8E
+#define ARM_CPU_PART_C1_PRO            0xD8B
 
 #define APM_CPU_PART_XGENE             0x000
 #define APM_CPU_VAR_POTENZA            0x00
 #define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)
 #define MIDR_CORTEX_A720AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720AE)
 #define MIDR_NEOVERSE_N3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N3)
+#define MIDR_C1_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_C1_PRO)
 #define MIDR_THUNDERX  MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)