#define XY_FAST_COLOR_BLT_CMD (2 << 29 | 0x44 << 22)
#define XY_FAST_COLOR_BLT_DEPTH_32 (2 << 19)
-#define XY_FAST_COLOR_BLT_DW 16
#define XY_FAST_COLOR_BLT_MOCS_MASK GENMASK(27, 22)
#define XE2_XY_FAST_COLOR_BLT_MOCS_INDEX_MASK GENMASK(27, 24)
#define XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT 31
bb->len += len;
}
+static u32 blt_fast_color_cmd_len(struct xe_device *xe)
+{
+ if (GRAPHICS_VERx100(xe) >= 1250)
+ return 16;
+ else
+ return 11;
+}
+
static void emit_clear_main_copy(struct xe_gt *gt, struct xe_bb *bb,
u64 src_ofs, u32 size, u32 pitch, bool is_vram)
{
struct xe_device *xe = gt_to_xe(gt);
u32 *cs = bb->cs + bb->len;
- u32 len = XY_FAST_COLOR_BLT_DW;
+ u32 len = blt_fast_color_cmd_len(xe);
- if (GRAPHICS_VERx100(xe) < 1250)
- len = 11;
*cs++ = XY_FAST_COLOR_BLT_CMD | XY_FAST_COLOR_BLT_DEPTH_32 |
(len - 2);
static u32 emit_clear_cmd_len(struct xe_gt *gt)
{
+ struct xe_device *xe = gt_to_xe(gt);
+
if (gt->info.has_xe2_blt_instructions)
return PVC_MEM_SET_CMD_LEN_DW;
else
- return XY_FAST_COLOR_BLT_DW;
+ return blt_fast_color_cmd_len(xe);
}
static void emit_clear(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,