host->bits_per_word_mask = SPI_BPW_MASK(8);
host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
- err = devm_spi_register_controller(&pdev->dev, host);
+ err = spi_register_controller(host);
if (err) {
dev_err(&pdev->dev, "register host failed: %d\n", err);
goto fail;
struct spi_controller *host = platform_get_drvdata(pdev);
struct octeon_spi *p = spi_controller_get_devdata(host);
+ spi_controller_get(host);
+
+ spi_unregister_controller(host);
+
/* Clear the CSENA* and put everything in a known state. */
writeq(0, p->register_base + OCTEON_SPI_CFG(p));
+
+ spi_controller_put(host);
}
static const struct of_device_id octeon_spi_match[] = {