drm/i915/psr: Compute PSR entry_setup_frames into intel_crtc_state

commit 7caac659a837af9fd4cad85be851982b88859484 upstream.

PSR entry_setup_frames is currently computed directly into struct
intel_dp:intel_psr:entry_setup_frames. This causes a problem if mode change
gets rejected after PSR compute config: Psr_entry_setup_frames computed for
this rejected state is in intel_dp:intel_psr:entry_setup_frame. Fix this by
computing it into intel_crtc_state and copy the value into
intel_dp:intel_psr:entry_setup_frames on PSR enable.

Fixes: 2b981d57e480 ("drm/i915/display: Support PSR entry VSC packet to be transmitted one frame earlier")
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: <stable@vger.kernel.org> # v6.8+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312083710.1593781-3-jouni.hogander@intel.com
(cherry picked from commit 8c229b4aa00262c13787982e998c61c0783285e0)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
[ dropped intel_psr_needs_wa_18037818876 hunk and adjusted surrounding context ]
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9812191e7ef29cf5ec0a30a2d57a844f4732a761..2039c17a9ee787ea001c3c6df9c8d6db9a2169cb 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1218,6 +1218,7 @@ struct intel_crtc_state {
        bool wm_level_disabled;
        u32 dc3co_exitline;
        u16 su_y_granularity;
+       u8 entry_setup_frames;
 
        /*
         * Frequence the dpll for the port should run at. Differs from the

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index fb948b117ca72dc56d2d47fa2624a8956ceda8e8..e127ce172709cd9436084e18c86109b696ac77c1 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1571,7 +1571,7 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
        entry_setup_frames = intel_psr_entry_setup_frames(intel_dp, adjusted_mode);
 
        if (entry_setup_frames >= 0) {
-               intel_dp->psr.entry_setup_frames = entry_setup_frames;
+               crtc_state->entry_setup_frames = entry_setup_frames;
        } else {
                drm_dbg_kms(display->drm,
                            "PSR condition failed: PSR setup timing not met\n");
@@ -1979,6 +1979,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
        intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
        intel_dp->psr.req_psr2_sdp_prior_scanline =
                crtc_state->req_psr2_sdp_prior_scanline;
+       intel_dp->psr.entry_setup_frames = crtc_state->entry_setup_frames;
 
        if (!psr_interrupt_error_check(intel_dp))
                return;