riscv: dts: starfive: jh7110: Drop CAMSS node

The starfive-camss driver and bindings were dropped, as they were no
longer being worked upon for destaging.

Drop the relevant node as well to avoid the following build warning:
"failed to match any schema with compatible: ['starfive,jh7110-camss']"

Reported-by: Conor Dooley <conor@kernel.org>
Closes: https://lore.kernel.org/all/20260420-very-cartel-645595ffd1c7@spud/
Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com>
Reviewed-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 8cfe8033305d80cbe6179ed26601ca057ee00f16..a7a1c09a2c9075711f3a214a49618911fdc7b421 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -135,29 +135,6 @@
        clock-frequency = <49152000>;
 };
 
-&camss {
-       assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
-                         <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
-       assigned-clock-rates = <49500000>, <198000000>;
-
-       ports {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               port@0 {
-                       reg = <0>;
-               };
-
-               port@1 {
-                       reg = <1>;
-
-                       camss_from_csi2rx: endpoint {
-                               remote-endpoint = <&csi2rx_to_camss>;
-                       };
-               };
-       };
-};
-
 &csi2rx {
        assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
        assigned-clock-rates = <297000000>;
@@ -175,9 +152,7 @@
                port@1 {
                        reg = <1>;
 
-                       csi2rx_to_camss: endpoint {
-                               remote-endpoint = <&camss_from_csi2rx>;
-                       };
+                       /* remote CAMSS endpoint */
                };
        };
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 6e56e9d20bb064e86b57a92d4cb05be330cca01a..9c3e4598747eb5541effe697044484715569a285 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -1199,34 +1199,6 @@
                        #phy-cells = <0>;
                };
 
-               camss: isp@19840000 {
-                       compatible = "starfive,jh7110-camss";
-                       reg = <0x0 0x19840000 0x0 0x10000>,
-                             <0x0 0x19870000 0x0 0x30000>;
-                       reg-names = "syscon", "isp";
-                       clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
-                                <&ispcrg JH7110_ISPCLK_ISPV2_TOP_WRAPPER_C>,
-                                <&ispcrg JH7110_ISPCLK_DVP_INV>,
-                                <&ispcrg JH7110_ISPCLK_VIN_P_AXI_WR>,
-                                <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>,
-                                <&syscrg JH7110_SYSCLK_ISP_TOP_CORE>,
-                                <&syscrg JH7110_SYSCLK_ISP_TOP_AXI>;
-                       clock-names = "apb_func", "wrapper_clk_c", "dvp_inv",
-                                     "axiwr", "mipi_rx0_pxl", "ispcore_2x",
-                                     "isp_axi";
-                       resets = <&ispcrg JH7110_ISPRST_ISPV2_TOP_WRAPPER_P>,
-                                <&ispcrg JH7110_ISPRST_ISPV2_TOP_WRAPPER_C>,
-                                <&ispcrg JH7110_ISPRST_VIN_P_AXI_RD>,
-                                <&ispcrg JH7110_ISPRST_VIN_P_AXI_WR>,
-                                <&syscrg JH7110_SYSRST_ISP_TOP>,
-                                <&syscrg JH7110_SYSRST_ISP_TOP_AXI>;
-                       reset-names = "wrapper_p", "wrapper_c", "axird",
-                                     "axiwr", "isp_top_n", "isp_top_axi";
-                       power-domains = <&pwrc JH7110_PD_ISP>;
-                       interrupts = <92>, <87>, <90>, <88>;
-                       status = "disabled";
-               };
-
                voutcrg: clock-controller@295c0000 {
                        compatible = "starfive,jh7110-voutcrg";
                        reg = <0x0 0x295c0000 0x0 0x10000>;