static uint64_t omap_id_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = opaque;
-
if (size != 4) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: read at offset 0x%" HWADDR_PRIx
" with bad width %d\n", __func__, addr, size);
return 0xcafeb574;
case 0xfffed400: /* JTAG_ID_LSB */
- switch (s->mpu_model) {
- case omap310:
- return 0x03310315;
- case omap1510:
- return 0x03310115;
- default:
- hw_error("%s: bad mpu model\n", __func__);
- }
- break;
+ return 0x03310315; /* omap310 */
case 0xfffed404: /* JTAG_ID_MSB */
- switch (s->mpu_model) {
- case omap310:
- return 0xfb57402f;
- case omap1510:
- return 0xfb47002f;
- default:
- hw_error("%s: bad mpu model\n", __func__);
- }
+ return 0xfb57402f; /* omap310 */
break;
}
memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-ed4", &mpu->id_iomem,
0xfffed400, 0x100);
memory_region_add_subregion(memory, 0xfffed400, &mpu->id_iomem_ed4);
- if (!cpu_is_omap15xx(mpu)) {
- memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-e20",
- &mpu->id_iomem, 0xfffe2000, 0x800);
- memory_region_add_subregion(memory, 0xfffe2000, &mpu->id_iomem_e20);
- }
}
/* MPUI Control (Dummy) */
MemoryRegion *system_memory = get_system_memory();
/* Core */
- s->mpu_model = omap310;
s->cpu = ARM_CPU(cpu_create(cpu_type));
s->sdram_size = memory_region_size(dram);
s->sram_size = OMAP15XX_SRAM_SIZE;
s->wakeup, omap_findclk(s, "clk32-kHz"));
s->gpio = qdev_new("omap-gpio");
- qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);
omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck"));
sysbus_realize_and_unref(SYS_BUS_DEVICE(s->gpio), &error_fatal);
sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0,
SysBusDevice parent_obj;
MemoryRegion iomem;
- int mpu_model;
void *clk;
struct omap_gpio_s omap1;
};
gpio->clk = clk;
}
-static const Property omap_gpio_properties[] = {
- DEFINE_PROP_INT32("mpu_model", Omap1GpioState, mpu_model, 0),
-};
-
static void omap_gpio_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = omap_gpio_realize;
device_class_set_legacy_reset(dc, omap_gpif_reset);
- device_class_set_props(dc, omap_gpio_properties);
/* Reason: pointer property "clk" */
dc->user_creatable = false;
}
/* omap_i2c.c */
I2CBus *omap_i2c_bus(DeviceState *omap_i2c);
-#define cpu_is_omap310(cpu) (cpu->mpu_model == omap310)
-#define cpu_is_omap1510(cpu) (cpu->mpu_model == omap1510)
-#define cpu_is_omap1610(cpu) (cpu->mpu_model == omap1610)
-#define cpu_is_omap1710(cpu) (cpu->mpu_model == omap1710)
-
-#define cpu_is_omap15xx(cpu) \
- (cpu_is_omap310(cpu) || cpu_is_omap1510(cpu))
-#define cpu_is_omap16xx(cpu) \
- (cpu_is_omap1610(cpu) || cpu_is_omap1710(cpu))
-
struct omap_mpu_state_s {
- enum omap_mpu_model {
- omap310,
- omap1510,
- omap1610,
- omap1710,
- } mpu_model;
-
ARMCPU *cpu;
qemu_irq *drq;
MemoryRegion id_iomem;
MemoryRegion id_iomem_e18;
MemoryRegion id_iomem_ed4;
- MemoryRegion id_iomem_e20;
MemoryRegion mpui_iomem;
MemoryRegion tcmi_iomem;
MemoryRegion clkm_iomem;