drm/amd/display: Add ADDR3 swizzle modes

[Why]
New swizzle modes are needed for ADDR3 block support.

[How]
Add DC_ADDR3_SW_64KB_2D_Z and DC_ADDR3_SW_256KB_2D_Z enum
values to dc_hw_types.h.

Reviewed-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Signed-off-by: Wenxian Wang <wenxian.wang@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index c2ca08d26e3711ab7cf691ccdb086425f3242197..fa64bf6e711cef61e3db19bfc598d2a9074efb18 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -346,7 +346,9 @@ enum swizzle_mode_addr3_values {
        DC_ADDR3_SW_4KB_3D = 5,
        DC_ADDR3_SW_64KB_3D = 6,
        DC_ADDR3_SW_256KB_3D = 7,
-       DC_ADDR3_SW_MAX = 8,
+       DC_ADDR3_SW_64KB_2D_Z = 8,
+       DC_ADDR3_SW_256KB_2D_Z = 9,
+       DC_ADDR3_SW_MAX = 10,
        DC_ADDR3_SW_UNKNOWN = DC_ADDR3_SW_MAX
 };
 

diff --git a/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c b/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c
index e12ed7591848938d1bb67b1290ac42b30fdede0c..bf30a1bb61b75acb84f43e6e8f386db3c0d7f41b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c
@@ -617,7 +617,9 @@ bool hubbub401_dcc_support_swizzle(
                        swizzle_supported = true;
                break;
        case DC_ADDR3_SW_64KB_2D:
+       case DC_ADDR3_SW_64KB_2D_Z:
        case DC_ADDR3_SW_256KB_2D:
+       case DC_ADDR3_SW_256KB_2D_Z:
                swizzle_supported = true;
                break;
        default: