silence comiler warning. [RT #18630]

diff --git a/lib/isc/ia64/include/isc/atomic.h b/lib/isc/ia64/include/isc/atomic.h
index 94b0f7b7b85994d40b15687b35aac510b50799fa..520b0fe5d89d8109fbbfd48a4ba8bb4307a24803 100644 (file)
--- a/lib/isc/ia64/include/isc/atomic.h
+++ b/lib/isc/ia64/include/isc/atomic.h
@@ -14,7 +14,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 
-/* $Id: atomic.h,v 1.2 2006/06/21 03:36:54 marka Exp $ */
+/* $Id: atomic.h,v 1.2.2.2 2009/02/04 04:44:44 marka Exp $ */
 
 #ifndef ISC_ATOMIC_H
 #define ISC_ATOMIC_H 1
@@ -31,7 +31,11 @@
  * (e.g., 1 and -1)?
  */
 static inline isc_int32_t
-isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
+isc_atomic_xadd(isc_int32_t *p, isc_int32_t val)
+#ifdef __GNUC__
+__attribute__ ((unused))
+#endif
+{
        isc_int32_t prev, swapped;
 
        for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
@@ -53,7 +57,11 @@ isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
  * This routine atomically stores the value 'val' in 'p'.
  */
 static inline void
-isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
+isc_atomic_store(isc_int32_t *p, isc_int32_t val)
+#ifdef __GNUC__
+__attribute__ ((unused))
+#endif
+{
        __asm__ volatile(
                "st4.rel %0=%1"
                : "=m" (*p)
@@ -68,7 +76,11 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
  * case.
  */
 static inline isc_int32_t
-isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
+isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val)
+#ifdef __GNUC__
+__attribute__ ((unused))
+#endif
+{
        isc_int32_t ret;
 
        __asm__ volatile(